Renesas M3A-HS60 )

Functional Overview

2.8 Reset Module

Rev.1.00 June 1,2005 2-14

REJ11J0002-0100Z

2

2.8 Reset Module

This module controls the reset signals connected to both the SH7206 and Flash memory mounted in the M3A-HS60.

Figure2.8.1 shows a block diagram of the reset module in M3A-HS60.

3.3V

Reset switch

SW 2

Reset IC

M51957BFP

Input

Delay capacitance

Flash memory

*

*

Open-collector output

Output

3.3V

RP#

Ra

Rb

Cd

R

esetIC output delay time,td=0.34 x Cd(pF)µsec = 34ms

R

esetIC output detection voltage,Vs = 1.25 x = 2.5V

)

Rb

Ra+Rb

)

10KW

10KW

0.1µF

Extension connect

or

RESET#

RES#

SH7206

H-UDI connector

RES#

Figure2.8.1 Block Diagram of Reset Module

2.9 Interrupt Switches

As for the M3A-HS60, both the SH7206's NMI interrupt pin and MRES pin have a push switch connected. MRES switch

can be used for controlling manual reset for SH7206. When manual reset is done, the internal condition of CPU will be

formatted, but each register of on-chip peripheral module.

Figure2.9.1 shows a block diagram of interrupt switches.

NMI switch

SH7206

3.3V

NMI#

SW 5

M

RES switch

3.3V

MRES#/PE13

SW 6

Figure2.9.1 Block Diagram of Interrupt Switches

Contents

Main REJ11J0002-0100Z Issued:June 1,2005 Renesas32-Bit RISC Microcomputers SuperHTM RISC Engine Family/SH7200 Series/SH7206 Group M3 SH7206 CPU Board A -HS60 User's Manual Page Page Table of Contents Page Overview 1.1 Overview 1.2 Configuration Overview 1.3 External Specifications Page Overview 1.5 M3A-HS60 Block Diagram SH7206 CPU Board M3A-HS60 Overview 1.6 M3A-HS60 Board Overview Rev.1.00 June 1,2005 1-6 REJ11J0002-0100Z 1.6 M3A-HS60 Board Overview Figure1.6.1 shows the M3A-HS60 board overview. Page Overview 1.7 M3A-HS60 Memory Mapping Overview 1.8 Absolute Maximum Ratings 1.9 Recommended Operating Conditions Page Page Functional Overview 2.1 Functional Overview Functional Overview 2.2 CPU SH7206 Rev.1.00 June 1,2005 2-3 REJ11J0002-0100Z 2.2 CPU Functional Overview 2.3 Memory 2.3.1 SH7206's Internal RAM 2.3.2 Flash Memory M5M29KT331AVP (included as standard equipment) Page 2.3.3 External SDRAM Page 2.3.3 External SDRAM Rev.1.00 June 1,2005 2-8 REJ11J0002-0100Z Figure2.3.4 Typical SDRAM Single Read/Write Timing Functional Overview 2.4 Serial Port Interface Functional Overview 2.5 I/O Ports Page Functional Overview 2.6 Power Supply Circuit Functional Overview 2.7 Clock Module Functional Overview 2.8 Reset Module * * ) 2.9 Interrupt Switches Functional Overview 2.10 E10A-USB Rev.1.00 June 1,2005 2-15 REJ11J0002-0100Z 2.10 E10A-USB Interface Figure2.10.1 Block Diagram of the E10A-USB Interface Page Page Operational Specifications 3.1 M3A-HS60 Connectors Outline 3.1.1 H-UDI Connector (J1) 3.1.2 Serial Port Connector (J2) 3.1.3 External Power Supply Connectors(J3 and J5) 3.1.4 Power Supply Connector (J4) 3.1.5 User I/O Connectors (J6-J8) Page 3.1.6 Extension Connectors (J9-J13) Page Page Page Operational Specifications 3.2 Outline of Switches and LEDs 3.2.1 Power Supply Select Jumpers (JP1 and JP2) 3.2.2 Switch and LED Functions NMI RST MRES Page Operational Specifications 3.3 Outline Dimensions of M3A-HS60 Page Page Page SH-2A SH7206 CPU BOARD M3A-HS60 SCHEMATICS INDEX CPU SH7206 FLASH SDRAM UDI/RESET/UART/POWER BUS CONNECTORS/PUSH SW OTHERS [Note] :not mounted PAGE 1 2 3 4 5 6 7 TITLE SH7206 MD2 pin is fixed to "H" MD0 pin is fixed to "L" _CS0 = 16bit SH7206 Extention Connector 16bit Bus For SH7206 Bus Connector CLK 16.66MHz FLASH CSC CHANNEL 0 16bit access = 4MB Decoupling Caps SDRAM_SZ = "L" 16bit MODE DUMPING REGISTER for SDRAM SDRAM_SZ = "H" 32bit MODE EDS1216AATA EDS1216AATA User Port 1.2V EXTERNAL Mode Switch 5V TO 1.25V STEP DOWN REGULATOR SERIAL CONNECTOR(COM) Extension Bus Connector MRES MRES SWITCH CIRCUIT Extension Connector NMI UNUSED LOGIC AGND-GND TEST PIN