Renesas M3A-HS60

Operational Specifications

3.1.5 User I/O Connectors (J6-J8)

Rev.1.00 June 1,2005 3-10

REJ11J0002-0100Z

Table 3.1.8 to 3.1.12 list pin assignments of extension connector.

Table3.1.8 Pin Assignment of Extension connector(J9)

Pin Signal name Pin Signal name

1 NC 2 NC

3 EXCLK 4 A9

5 A8 6 A7

7 A6 8 A5

9 A4 10 A3

11 A2 12 A1/PC1

13 A0/PC0 14 CS0#

15 CS1#/POE5/PA11 16 CS2#/TCLKA/PA6

17 RASU#/PINT4/CS4#/PA20 18 CASU#/PINT5/CS5#/CE1A#/TIC5U/PA21

19 RESET# 20 GND

Table3.1.9 Pin Assignment of Extension connector(J10)

Pin Signal name Pin Signal name

1 +3.3V 2 +3.3V

3 WDTOVF# 4 A25/DREQ0/IRQ0/SCK0/PA2

5 A24/RXD1/PA3 6 A23/TXD1/PA4

7 A22/DREQ1/IRQ1/SCK1/PA5 8 A21/IRQ7/ADTRG#/POE8#/PB9

9 A20 10 A19

11 A18 12 A17

13 A16 14 A15

A14

16 A13

17 A12 18 A11

19 A10 20 GND

21 NC 22 NC

23 EXCLK 24 A9

25 A8 26 A7

27 A6 28 A5

29 A4 30 A3

31 A2 32 A1/PC1

33 A0/PC0 34 CS0#

35 CS1#/POE5/PA11 36 CS2#/TCLKA/PA6

37 RASU#/PINT4/CS4#/PA20 38 CASU#/PINT5/CS5#/CE1A#/TIC5U/PA21

39 RESET# 40 GND

Contents

Main REJ11J0002-0100Z Issued:June 1,2005 Renesas32-Bit RISC Microcomputers SuperHTM RISC Engine Family/SH7200 Series/SH7206 Group M3 SH7206 CPU Board A -HS60 User's Manual Page Page Table of Contents Page Overview 1.1 Overview 1.2 Configuration Overview 1.3 External Specifications Page Overview 1.5 M3A-HS60 Block Diagram SH7206 CPU Board M3A-HS60 Overview 1.6 M3A-HS60 Board Overview Rev.1.00 June 1,2005 1-6 REJ11J0002-0100Z 1.6 M3A-HS60 Board Overview Figure1.6.1 shows the M3A-HS60 board overview. Page Overview 1.7 M3A-HS60 Memory Mapping Overview 1.8 Absolute Maximum Ratings 1.9 Recommended Operating Conditions Page Page Functional Overview 2.1 Functional Overview Functional Overview 2.2 CPU SH7206 Rev.1.00 June 1,2005 2-3 REJ11J0002-0100Z 2.2 CPU Functional Overview 2.3 Memory 2.3.1 SH7206's Internal RAM 2.3.2 Flash Memory M5M29KT331AVP (included as standard equipment) Page 2.3.3 External SDRAM Page 2.3.3 External SDRAM Rev.1.00 June 1,2005 2-8 REJ11J0002-0100Z Figure2.3.4 Typical SDRAM Single Read/Write Timing Functional Overview 2.4 Serial Port Interface Functional Overview 2.5 I/O Ports Page Functional Overview 2.6 Power Supply Circuit Functional Overview 2.7 Clock Module Functional Overview 2.8 Reset Module * * ) 2.9 Interrupt Switches Functional Overview 2.10 E10A-USB Rev.1.00 June 1,2005 2-15 REJ11J0002-0100Z 2.10 E10A-USB Interface Figure2.10.1 Block Diagram of the E10A-USB Interface Page Page Operational Specifications 3.1 M3A-HS60 Connectors Outline 3.1.1 H-UDI Connector (J1) 3.1.2 Serial Port Connector (J2) 3.1.3 External Power Supply Connectors(J3 and J5) 3.1.4 Power Supply Connector (J4) 3.1.5 User I/O Connectors (J6-J8) Page 3.1.6 Extension Connectors (J9-J13) Page Page Page Operational Specifications 3.2 Outline of Switches and LEDs 3.2.1 Power Supply Select Jumpers (JP1 and JP2) 3.2.2 Switch and LED Functions NMI RST MRES Page Operational Specifications 3.3 Outline Dimensions of M3A-HS60 Page Page Page SH-2A SH7206 CPU BOARD M3A-HS60 SCHEMATICS INDEX CPU SH7206 FLASH SDRAM UDI/RESET/UART/POWER BUS CONNECTORS/PUSH SW OTHERS [Note] :not mounted PAGE 1 2 3 4 5 6 7 TITLE SH7206 MD2 pin is fixed to "H" MD0 pin is fixed to "L" _CS0 = 16bit SH7206 Extention Connector 16bit Bus For SH7206 Bus Connector CLK 16.66MHz FLASH CSC CHANNEL 0 16bit access = 4MB Decoupling Caps SDRAM_SZ = "L" 16bit MODE DUMPING REGISTER for SDRAM SDRAM_SZ = "H" 32bit MODE EDS1216AATA EDS1216AATA User Port 1.2V EXTERNAL Mode Switch 5V TO 1.25V STEP DOWN REGULATOR SERIAL CONNECTOR(COM) Extension Bus Connector MRES MRES SWITCH CIRCUIT Extension Connector NMI UNUSED LOGIC AGND-GND TEST PIN