Rev. 5.00, 09/03, page 361 of 760
Relationship between Request Modes and Bus Modes by DMA Transfer Category: Table
11. 6 sho ws the r e l a t i onship between re quest modes and bus modes by DMA transfer cate gory.
Table 11.6 Relationship between Request Modes and Bus Modes by DMA Transfer
Category
Address
Mode Transfer Category Request
Mode Bus
Mode Transfer
Size (Bits) Usable
Channels
Dual External device with DACK and
external memory External B/C 8/16/32/128 0,1
External device with DACK and
memory-map ped external device External B/C 8/16/32/128 0, 1
External memory and external
memory All*1B/C 8/16/32/128 0–3*5
External memory and me mory-
mapped external device All *1B/C 8/16/32/128 0–3*5
Memory -mapped external device
and memory-map ped external
device
All *1B/C 8/16/32/128 0–3*5
External memory and on-c hip
peripheral module All *2B/C*38/16/32*40–3*5
Memory -mapped external device
and on-chip peripheral module All *2B/C*38/16/32*40–3*5
On-chip peri pheral module and on-
chip peripheral module All *2B/C*38/16/32*40–3*5
Single External device with DACK and
external memory External B/C 8/16/32/128 0, 1
External device with DACK and
memory-map ped external device External B/C 8/16/32/128 0, 1
B: Burst, C: Cycle-steal
Notes: 1. External requests, auto request s and on-chip peripheral modu le (CM T ) requests are all
available.
2. External requests, auto request s and on-chip peripheral modu le reque sts are all
available. When the IrDA, SCIF, or A/D converter is also the transfer request source,
however, the transfer destination or transfer source must be the IrDA, SCIF, or A/D
converter, respectively.
3. If the transfer request source is the IrDA, SCIF, or A/D converter only cycle-steal mode
is available.
4. The access size permitted when the transfer destination or source is an on-chip
peripheral module register.
5. If the transfer request is an external request, o nly channels 0 and 1 are available.