Seagate 6451, 6450 manual Error Register, Field/Bit Description

36 Medalist Pro 6450/6451 Product Manual, Rev. B

∙During the entire burst, –CS0, –CS1, and –IOCS16 are in the high negated state. DA2, DA1 and DA0 are driven low.

∙The drive begins driving and stops tristating IORDY when –DMACK is first asserted and SyncDMA is enabled. The drive must continue to drive IORDY until –DMACK is de-asserted and then tristates IORDY within (Tiordyz) nanoseconds.

∙A device that supports a particular mode timing must support all slower modes

3.3.3Error Register

Field/Bit Description

Bit	7	6	5	4	3	2	1	0
	ICRCE	UNC	MC	IDNF	MCR	ABRT	TKONF	AMNF

∙ICRCE (Interface CRC Error) indicates that a CRC error occurred on the data bus during a Synchronous DMA transfer. The correct re- sponse for this error is to retry the complete command. ABRT (bit 2) is also set to ensure compatibility with drivers designed for previous versions of the Synchronous DMA Transfer Protocol Specification.

∙ABRT (Aborted Command) indicates that the requested command was aborted because the command code or a command parameter was invalid, or some other error occurred. The device may complete some portion of the command before setting ABRT and terminating the command. If the command was a data-transfer command, the data transfer is determinate. This bit is also set when an Interface CRC Error (bit 7) occurs. This ensures compatibility with drivers designed for previous versions of the Synchronous DMA Protocol Specification.