2-Port USB 2.0 Hub Controller

 

 

 

Datasheet

 

Table 4.1 2-Port Hub Pin Descriptions (continued)

 

 

 

 

NAME

SYMBOL

TYPE

FUNCTION

 

 

 

 

 

 

2-PORT USB 2.0 HUB INTERFACE

 

 

 

 

High-Speed USB

USBDN[2:1]

IO-U

These pins connect to the downstream USB peripheral

Data

USBDP[2:1]

 

devices attached to the Hub’s ports.

 

 

 

 

USB Power

PRTPWR

O8

Enables power to USB peripheral devices (downstream).

Enable

 

 

The active signal level of the PRTPWR pin is determined by

 

 

 

 

 

 

the Power Polarity Strapping function of the PRTPWR_POL

 

 

 

pin.

 

 

 

 

Port [2:1] Green

GR[2:1]/

I/O8

Green indicator LED for ports 2 and 1. Will be active low

LED

NON_REM[1:0]

 

when LED support is enabled via EEPROM or SMBus.

&

 

 

If the hub is configured by the internal default configuration,

Port Non-

 

 

 

 

these pins will be sampled at the rising edge of RESET_N

Removable

 

 

 

 

(see the applicable RESET_N timing table in Section 5.6.1)

strapping option.

 

 

 

 

to determine if ports [2:1] contain permanently attached

 

 

 

(non-removable) devices. Also, the active state of the LED’s

 

 

 

will be determined as follows:

 

 

 

NON_REM[1:0] = ‘00’, All ports are removable,

 

 

 

GR2 is active high,

 

 

 

GR1 is active high.

 

 

 

NON_REM1:0] = ‘01’, Port 1 is non-removable,

 

 

 

GR2 is active high,

 

 

 

GR1 is active low.

 

 

 

NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable,

 

 

 

GR2 is active low,

 

 

 

GR1 is active high.

 

 

 

NON_REM[1:0] = ‘11’, Ports 1 & 2 are non-removable,

 

 

 

GR2 is active low,

 

 

 

GR1 is active low.

 

 

 

 

Port Power

PRTPWR_POL

I/O8

Port Power Polarity strapping determination for the active

Polarity strapping.

 

 

signal polarity of the PRTPWR pin.

 

 

 

While RESET_N is asserted, the logic state of this pin will

 

 

 

(though the use of internal combinatorial logic) determine

 

 

 

the active state of the PRTPWR pin in order to ensure that

 

 

 

downstream port power is not inadvertently enabled to

 

 

 

inactive ports during a hardware reset.

 

 

 

On the rising edge of RESET_N (see the applicable

 

 

 

RESET_N timing table in Section 5.6.1), the logic value will

 

 

 

be latched internally, and will retain the active signal polarity

 

 

 

for the PRTPWR pin.

 

 

 

‘1’ = PRTPWR pin has an active ‘high’ polarity

 

 

 

‘0’ = PRTPWR pin has an active ‘low’ polarity

 

 

 

 

Over Current

OCS_N

IPU

Input from external current monitor indicating an over-

Sense

 

 

current condition. {Note: Contains internal pull-up to 3.3V

 

 

 

supply}

 

 

 

 

USB Transceiver

RBIAS

I-R

A 12.0kΩ (+/− 1%) resistor is attached from ground to this

Bias

 

 

pin to set the transceiver’s internal bias settings.

 

 

 

 

Revision 2.3 (08-27-07)

12

SMSC USB2502

 

DATASHEET