Industrial Temperature Rated USB 2.0
Datasheet
Table 3.1 USB2514 Pin Descriptions (continued)
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SYMBOL | 36 QFN | 48 QFN | TYPE |
| DESCRIPTION |
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CFG_SEL2 | n/a | 33 | I |
| Configuration Programming Select |
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| Note: This pin is not available in all packages; it is |
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| held to a logic ‘0’ when not available |
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| The logic state of this pin is internally latched on the |
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| rising edge of RESET_N (RESET_N negation), and will |
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| determine the hub configuration method as described in |
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| MISC | |
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XTAL1/ | 33 | 45 | ICLKx |
| Crystal Input/External Clock Input |
CLKIN |
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| 24MHz crystal or external clock input. |
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| This pin connects to either one terminal of the crystal or |
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| to an external 24/48MHz clock when a crystal is not |
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| used. |
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| Note: 48MHz only available in 48 QFN. |
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XTAL2 | 32 | 44 | OCLKx |
| Crystal Output |
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| 24MHz Crystal |
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| This is the other terminal of the crystal, or pulled high |
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| when an external clock source is used to drive |
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| XTAL1/CLKIN. This output must not be used to drive |
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| any external circuitry other than the crystal circuit. |
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RESET_N | 26 | 34 | IS |
| RESET Input |
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| The system can reset the chip by driving this input low. |
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| The minimum active low pulse is 1 us. |
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| When the RESET_N pin is pulled to VDD33, the internal |
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| POR (Power on Reset) is enabled and no external reset |
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| circuitry is required. The internal POR holds the internal |
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| logic in reset until the power supplies are stable. |
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SMSC USB2513i | 13 | Revision 1.98 |
| DATASHEET |
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