Tektronix TDS 620A, TDS 640A, TDS 644A Operations Common to Pattern and State

Logic Triggering
TDS 620A, 640A & 644A User Manual 3Ć77
TableĂ3Ć3:ăLogicTriggers
Pattern State Definition 1,2
AND ClockedAND     
   3 
   
NAND Clocked NAND       "
    3
    "

OR Clocked OR      "
    3
    "

NOR ClockedNOR      "
    3
    "

1Note that for State class triggers, the definition must be met at the time the clock input
changes state. See the descriptions for Pattern and State in this section.
2The definitions given here are correct for the Goes Truesetting in the Trigger When menu.
If that menu is set to Goes False, swap the definition for AND with that for NAND and for OR
with NOR for both pattern and state classes.
3The logic inputs are channels 1, 2, 3, and 4 for the TDS 640A & TDS 644A and 1, 2, Aux 1
and Aux 2 for the TDS 620A when using PatternLogic Triggers. For State Logic Triggers,
channel 4 (Aux 2 for the TDS 620A) becomes the clock input, leaving the remaining chanĆ
nels as logic inputs.
    "  !      
            
   
 TRIGGER MENU➞Type➞Logic"➞
Class➞Pattern  State "
Operations Common
to Pattern and State