Glossary

external interrupt: A hardware interrupt triggered by a specific value on a pin.

external memory interface (EMIF): Microprocessor hardware that is used to read to and write from off-chip memory.

F

fetch packet: A contiguous 8-word series of instructions fetched by the CPU and aligned on an 8-word boundary.

flag: A binary status indicator whose state indicates whether a particular condition has occurred or is in effect.

FLASH: The FLASH ROM API Module.

frame: An 8-word space in the cache RAMs. Each fetch packet in the cache resides in only one frame. A cache update loads a frame with the re- quested fetch packet. The cache contains 512 frames.

G

global interrupt enable bit (GIE): A bit in the control status register (CSR) that is used to enable or disable maskable interrupts.

H

host: A device to which other devices (peripherals) are connected and that generally controls those devices.

host port interface (HPI): A parallel interface that the CPU uses to commu- nicate with a host processor.

HPI: See host port interface; see also HPI module.

HPI module: HPI is an API module used for configuring the HPI registers. Functions are provided for reading HPI status bits and setting interrupt events.

I

index: A relative offset in the program address that specifies which of the 512 frames in the cache into which the current access is mapped.

Glossary A-5

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Texas Instruments TMS320C6000 manual Flash The Flash ROM API Module
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TMS320C6000 specifications

The Texas Instruments TMS320C6000 series is a family of digital signal processors (DSPs) that has gained significant traction in the field of digital signal processing since its introduction. Leveraging advanced processing technologies, the TMS320C6000 DSPs are particularly recognized for their high-performance capabilities, efficiency, and versatility, making them suitable for a wide variety of applications, including telecommunications, audio and video processing, medical instrumentation, and more.

One of the main features of the TMS320C6000 series is its advanced architecture, which incorporates a superscalar pipeline. This allows for the simultaneous execution of multiple instructions, leading to enhanced processing speeds. The architecture is designed to support both fixed-point and floating-point operations, offering flexibility for different computational requirements. The use of VLIW (Very Long Instruction Word) technology allows the execution of multiple operations in a single instruction cycle, further maximizing performance.

The TMS320C6000 family utilizes high-speed memory architectures, including a sophisticated cache system that minimizes memory access delays. Built-in hardware accelerators for specific functions, such as fast Fourier transforms (FFTs) and filter algorithms, streamline processing tasks that are critical in real-time applications. The DSPs also support a range of data formats, enabling them to handle diverse data types efficiently.

An important aspect of the TMS320C6000 series is its scalability. The family includes a wide range of devices, from low-power processors suitable for portable equipment to high-performance models designed for demanding computation tasks. This scalability ensures that developers can select the appropriate DSP for their specific application requirements.

In terms of power efficiency, the TMS320C6000 processors are designed to deliver high performance with optimized power consumption. This makes them ideal for battery-operated devices where power management is a critical concern. Additionally, TI's software tools, such as Code Composer Studio, provide developers with an integrated development environment that simplifies the design process and enhances productivity.

Lastly, the extensive support for various communication interfaces, including PCI, USB, and Ethernet, allows for seamless integration into existing systems. With a rich ecosystem of hardware and software support, the TMS320C6000 series remains a popular choice for engineers seeking powerful and versatile DSP solutions in modern electronic design.
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