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0.1 µF
0.1 µF
0.47 µF
33 µH
33 µH
OUTP
OUTN
L1
L2
C1
C2
C3
1 nF
Ferrite
Chip Bead
OUTP
OUTN
Ferrite
Chip Bead
1 nF

Gain setting via GAIN0 and GAIN1 inputs

INPUT RESISTANCE

TPA3008D2
SLOS435A – MAY 2004 – REVISED JULY 2004
APPLICATION INFORMATION (continued)

Figure 19. Typical LC Output Filter, Cutoff Frequency of 27 kHz, Speaker Impedance = 8

Figure 20. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3)

The gain of the TPA3008D2 is set by two input terminals, GAIN0 and GAIN1.

The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. Thiscauses the input impedance (Z

i

) to be dependent on the gain setting. The actual gain settings are controlled byratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by20% due to shifts in the actual resistance of the input resistors.

For design purposes, the input network (discussed in the next section) should be designed assuming an inputimpedance of 26 k, which is the absolute minimum input impedance of the TPA3008D2. At the lower gainsettings, the input impedance could increase as high as 165 k

Table 1. Gain Setting

INPUT IMPEDANCEAMPLIFIER GAIN (dB)

(k)GAIN1 GAIN0

TYP TYP

0 0 15.3 137

0 1 21.2 88

1 0 27.2 52

1 1 31.8 33

Each gain setting is achieved by varying the input resistance of the amplifier that can range from its smallestvalue, 33 k, to the largest value, 137 k. As a result, if a single capacitor is used in the input high-pass filter,the -3 dB or cutoff frequency changes when changing gain steps.

16