4.3 - BIOS Post Code
Code |
| Beeps / Description | Code |
| Beeps / Description | ||
02h |
| Verify Real Mode | 32h |
| Test CPU | ||
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| frequency | |
03h |
| Disable | 33h | Initialize Phoenix Dispatch | |||
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| Interrupt (NMI) |
|
| Manager | ||
04h | Get CPU type | 36h |
| Warm start shut down | |||
06h |
| Initialize system hardware | 38h | Shadow system BIOS ROM | |||
08h |
| Initialize chipset with initial | 3Ah |
| Autosize cache | ||
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| POST values |
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09h | Set IN POST flag | 3Ch |
| Advanced configuration of | |||
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| chipset registers | |
0Ah |
| Initialize CPU registers | 3Dh |
| Load alternate registers with | ||
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| CMOS values | |
0Bh |
| Enable CPU cache | 42h | Initialize interrupt vectors | |||
0Ch |
| Initialize caches to initial | 45h | POST device initialization | |||
|
| POST values |
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| |
0Eh |
| Initialize I/O component | 46h |
| . Check ROM | ||
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| copyright | notice |
0Fh |
| Initialize the local bus IDE | 48h |
| Check video configuration | ||
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| against CMOS | |
10h | Initialize Power | 49h | Initialize PCI bus and | ||||
|
| Management |
|
| devices | ||
11h |
| Load alternate registers with | 4Ah |
| Initialize all video adapters | ||
|
| initial POST values |
|
| in system | ||
12h | Restore CPU control word | 4Bh |
| QuietBoot start (optional) | |||
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| during warm boot |
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13h | Initialize PCI Bus Mastering | 4Ch | Shadow video BIOS ROM | ||||
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| devices |
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14h | Initialize keyboard controller | 4Eh | Display BIOS copyright | ||||
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| notice | |
16h |
| . BIOS ROM | 50h |
| Display CPU type and | ||
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| checksum |
|
| speed | ||
17h |
| Initialize cache before | 51h | Initialize EISA board | |||
|
| memory autosize |
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| |
18h | 8254 timer initialization | 52h | Test keyboard | ||||
1Ah |
| 8237 DMA controller | 54h |
| Set key click if enabled | ||
|
| initialization |
|
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| |
1Ch | Reset Programmable | 58h |
| . Test for | |||
|
| Interrupt Controller |
|
| unexpected interrupts | ||
20h |
| . Test DRAM refresh | 59h | Initialize POST display | |||
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|
| service | |
22h |
| . Test 8742 KBD | 5Ah |
| Display prompt "Press F2 to | ||
|
| Controller |
|
| enter SETUP" | ||
24h | Set ES segment register to | 5Bh |
| Disable CPU cache | |||
|
| 4 GB |
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| |
26h | Enable A20 line | 5Ch |
| Test RAM between 512 and | |||
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|
| 640 KB | |
28h | Autosize DRAM | 60h |
| Test extended memory | |||
29h | Initialize POST Memory | 62h | Test extended memory | ||||
|
| Manager |
|
| address lines | ||
2Ah |
| Clear 512 KB base RAM | 64h |
| Jump to UserPatch1 | ||
2Ch |
| . RAM failure on | 66h |
| Configure advanced cache | ||
|
| address |
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|
| registers | |
2Eh |
| . RAM failure on | 67h | Initialize Multi Processor | |||
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| data bits of low byte of |
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| APIC | ||
|
| memory bus |
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| |
2Fh |
| Enable cache before | 68h |
| Enable external and CPU | ||
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| 56 |
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