34
6.2 PROCESSOR I/O [A32-PIOM] PID OUTPUT CONNECTIONS
6.2.1 SCREW TERMINAL CONNECTIONS
Pin # TB1 [UPPER BLOCK] TB2 [LOWER BLOCK]
1 Tx+ COMPUTER COMMUNICATION PID OUT LOOP 25
2 Tx- SEE SECTION 4 PID OUT LOOP 26
3 Rx+ COMPUTER COMMUNICATION PID OUT LOOP 27
4 Rx- SEE SECTION 4 PID OUT LOOP 28
5 PID OUT LOOP 1 SEE SECTION PID OUT LOOP 29
6 PID OUT LOOP 2 6.1 FOR PID OUT LOOP 30
7 PID OUT LOOP 3 WIRING +5V LOGIC SUPPLY
8 PID OUT LOOP 4 PID OUT LOOP 31
9 PID OUT LOOP 5 PID OUT LOOP 32
10 PID OUT LOOP 6 DIGITAL OUT 57
11 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
12 PID OUT LOOP 7 DIGITAL OUT 58
13 PID OUT LOOP 8 DIGITAL OUT 59
14 PID OUT LOOP 9 DIGITAL OUT 60
15 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
16 PID OUT LOOP 10 DIGITAL OUT 61
17 PID OUT LOOP 11 DIGITAL OUT 62
18 PID OUT LOOP 12 DIGITAL OUT 63
19 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
20 PID OUT LOOP 13 DIGITAL OUT 64
21 PID OUT LOOP 14 ALARM OUT65 HIGHDEVIATION
22 PID OUT LOOP 15 ALARM OUT 66 LOW DEVIATION
23 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
24 PID OUT LOOP 16 ALARM OUT 67 HIGH PROCESS
25 PID OUT LOOP 17 ALARM OUT 68 LOW PROCESS
26 PID OUT LOOP 18 DIGITAL OUT 69
27 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
28 PID OUT LOOP 19 DIGITAL OUT 70
29 PID OUT LOOP 20 DIGITAL OUT 71
30 PID OUT LOOP 21 COMM WAT CH 72 COMMUNICATION TIMER
31 +5V LOGIC SUPPLY +5V LOGIC SUPPLY
32 PID OUT LOOP 22 LOGIC GROUND
33 PID OUT LOOP 23 CPU READY WATCHDOG TIMER
34 PID OUT LOOP 24 I sense - OPEN HEATER SENSOR
35 +5V LOGIC SUPPLY Outputs ON PID OUTPUTS ENABLE
36 LOGIC GROUND I sense + OPEN HEATER SENSOR
NOTES!
1. TB2 PIN 35 OUTPUTS ON MUST BE CONNECTED TO LOGIC
GROUND PIN 32 OF TB2 BEFORE PID DIGITAL OUTPUTS WILL BE
ACTIVE.
2. THE PID OUTPUTS ARE NEGATIVE LOGIC WITH REFERENCE TO
THE +5V LOGIC.
3. THE I SENSE OF PINS 34 & 36 ARE INPUTS FOR A SENSOR SIGNAL
IN THE OPEN HEATER DETECTION CIRCUIT.
Spare digital outputs and digital inputs are not used in the standard SYSTEM 32.