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Stereo Equalizer
Yamaha
YDG2030
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27 pages, 689.01 Kb
R4
1
CR
72
00 01 500 CR Printed in Japan
VQ95490
Pro Audio & Digital Musical Instrument Division
P.O. Box 3, Hamamatsu, 430-8651, Japan
Contents
Main
GRAPHIC EQUALIZER
OPERATING MANUAL MANUEL DUTILISATION BEDIENUNGSHANDBUCH
YDG2030
FCC INFORMATION (U.S.A.)
IMPORTANT NOTICE FOR THE UNITED KINGDOM
CANADA
Contents
English
Congratulations
Precautions
Backup battery
Cautions
Warnings
The front panel
B
A
0
The rear panel
1
2
3 4 5
Memory areas
How the memories are arranged in the YDG2030
Recalling an equalization setting
Storing an equalization setting
A note on software protection
Using the display
The [DISPLAY]key
Guide to the screen displays:
The [L/<] and [R/>] keys
Linking channels
The notch lter, and HPF and LPF indicators
Utilities
[%]
SYSTEM SETUP
TITLE EDIT
BULK DUMP
Y-485 NETWORK
Y-485 COMM. I/O
PARAMETER COPY
SOFTWARE PROTECT
MIDI CONTROL
DELAY DISPLAY
TUTORIAL
Finding a suitable memory area in which to store the setting
[^] or [%]
Initializing the memory area
Choosing 6 or 12dB boost/cut
Linking the L and R channels
Making graphic equalizer settings
Using the sweep function
Example I: Eliminating feedback
Example II: Tuning a room
Using the notch lters, and the HPF and LPF
I. Turning the lters on and off individually
II. Editing the lters graphically
III. Editing the lters numerically
Setting up the input level, attenuation and delay
I. Input level and input attenuation
II. Delay
Specications
Page
User programs / Programmes utilisateur / User-Programme
Unit number: ________ Programmer: _____________ Backed up to: ________ Date: ______
Program change table / Tableau de changement de programme / Program-Change-Tabelle
Unit number: ________ Bank: ________ Backed up to: ____________ Date: ________
68 Block diagram / Schma de principe / Blockdiagramm
Block diagram / Schma de principe / Blockdiagramm
DSP
CPU
69 Dimensions / Abmessungen
Dimensions / Abmessungen