MPCMM0002
13.0Guidelines for Third Party Chassis Vendors
This chapter describes some of the high level design of the Intel NetStructure® MPCMM0002 Chassis Management Module to help third party chassis vendors better understand how to incorporate the CMM into their chassis.
Note: The chapter excludes any low level design details of the individual components of the Chassis Management Module or the CMM firmware. This chapter also does not explain how to configure the CMM to work in a third party chassis. That information is contained in the Intel NetStructure® MPCMM0001 Chassis Management Module and Intel NetStructure® MPCMM0002 CMM Software Technical Product Specification for version 6.1.
13.1High Level Design
At a very high level, the CMM can be thought of as a black box, which has 42 IPMB buses to allow a variety of bus topologies. The GPIO signals are for
Figure 32 illustrates this high level CMM design.
Figure 32. High Level CMM Design
Dedicated I/O
Signals
CMM | 10 GPIOs |
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42 IPMB Buses
The figure below provides next level of details on how these pins are wired to different components on the CMM hardware.
Intel NetStructure® MPCMM0002 Chassis Management Module |
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Hardware TPS | July 2007 |
62 | Order Number: |
