Intel EMB-945T manual B.1 Programming, Configuring Sequence Description

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B.1 Programming

Mini - ITX	E M B - 9 4 5 T

B.1 Programming

EMB-945T utilizes ITE 8712 chipset as its watchdog timer controller.

Below are the procedures to complete its configuration and the AAEON intial watchdog timer program is also attached based on which you can develop customized program to fit your application.

Configuring Sequence Description

After the hardware reset or power-on reset, the ITE 8712 enters the normal mode with all logical devices disabled except KBC. The initial state (enable bit ) of this logical device (KBC) is determined by the state of pin 121 (DTR1#) at the falling edge of the system reset during power-on reset.

Appendix B Programming the Watchdog Time B-2

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Contents AC 97 Audio & Mini PCI EMB-945TIntel Core Duo/Solo Processor Up to 2.0 GHz Mini-ITX Marvell 88E8053 EthernetMini-ITX Copyright NoticeAcknowledgments Packing List Contents Chapter 2 Quick Installation GuideChapter 1 General Information Chapter 3 Award BIOS Setup Appendix A Driver InstallationAppendix B Programming The Watchdog Timer ChapterGeneral Information ChapterChapter 1 General Information 1.1 Introduction Chapter 1 General Information 1.2Features System 1.3 SpecificationsDisplay Page Quick Installation Guide Chapter 2 Quick Installation GuideMini ITX 2.1 Safety Precautions Locating Connectors and Jumpers Component Side 2.2 Location of Connectors and JumpersLocating Connectors and Jumpers Solder Side 2.3Mechanical Drawing Component Side Solder Side 2.4 List of Jumpers Jumpers2.5 List of Connectors ConnectorsCN24 2.6 Setting Jumpers OpenClosed 2.10 LCD INVERTER Voltage Selection JP4 2.7 LVDS1-LCDCN12Voltage Selection JP12.8 LVDS2-LCDCN10Voltage Selection JP2 2.9 COM2 Ring/+5V/+12V Selection JP3Function 2.13 CD-INConnector CN12.14 Digital I/O Connector CN2 2.12 Clear CMOS JP68 out 2.15 TV Out Connector CN32.16 Internal Keyboard Connector CN4 8 in2.20 LCD Inverter Connector CN8 2.17 Fan2 Connector CN52.18 Audio 5.1 Channel / SPDIF Connector CN6 2.19 Internal Mouse Connector CN72.21 PCI Express Slot For AAEON CN9 2.23 DVI Connector CN11 2.22 LVDS2-LCDConnector CN102.24 LVDS1-LCDConnector CN12 Pin Signal 2.25 COM6 RS-232Serial Port Connector CN132.26 COM3 RS-232Serial Port Connector CN14 2.27 Fan1 ConnectorCN152.28 COM5 RS-232Serial Port Connector CN16 2.29 COM4 RS-232Serial Port Connector CN172.30 IrDA Connector CN18 Mini ITXE M B - 9 4 5 T 2.31 ATX Power Connector CN192.32 USB Connector CN20 2.33 USB ConnectorCN212.34 EIDE Connector CN22 2.36 COM2 RS-232Serial Port Connector 2.35 Front Panel Connector CN23Chapter 3 Award BIOS Setup Award BIOS Setup3.1System Test and Initialization System configuration verification3.2Award BIOS Setup Entering SetupStandard CMOS Features Advanced BIOS FeaturesLoad Fail-SafeDefaults Advanced Chipset FeaturesPower Management Setup PnP/PCI ConfigurationsSet Supervisor/User Password Save and Exit SetupExit Without Saving Chapter 4 Driver Installation Driver InstallationFollow the sequence below to install the drivers SetupYukonWin.exe 4.1 InstallationStep 4 - Install Realtek AC97 codec Driver I/O Information AppendixAppendix A I/O Information A-1 Appendix A I/O Information A-2 A.1 I/O Address MapAppendix A I/O Information A-3 A.2 Memory Address Map A.3 IRQ Mapping ChartAppendix A I/O Information A-4 A.4 DMA Channel AssignmentsAppendix B Programming the Watchdog Time B-1 Programming the Watchdog TimerConfiguring Sequence Description B.1 ProgrammingAppendix B Programming the Watchdog Time B-2 Appendix B Programming the Watchdog Timer B-3 1 Enter the MB PnP Mode2 Modify the Data of the Registers 3 Exit the MB PnP ModeWatchDog Timer Configuration Registers Configure Control Index=02hAppendix B Programming the Watchdog Time B-4 Appendix B Programming the Watchdog Timer B-5 B.2 IT8712 Watchdog Timer Initial Program game port enable mov cl, call Set Logic Device Read Configuration Data PROC NEAR RET Exit Configuration Mode ENDPCALL Read Configuration Data CMP AL,87h CALL Read Configuration Data CMP AL,12hMOV DX,WORD PTR CS Cfg Port+06h IN AL,DX RET Set Logic Device endp END Mainpush ax push cx xchg al,cl mov cl,07h call Superio Set Reg pop cx pop ax ret