Intel 281786-002 manual PCI Configuration Space MAP

Page 17

Appendix C

I/O Map

 

 

 

Address (hex)

Size

Description

0000 - 000F

16 bytes

PIIX - DMA 1

0020

- 0021

2 bytes

PIIX - Interrupt Controller 1

0040

- 0043

4 bytes

PIIX - Timer 1

0048 - 004B

4 bytes

PIIX - Timer 2

0060

1 byte

Keyboard Controller Data Byte

0061

1 byte

PIIX - NMI, speaker control

0064

1 byte

Kbd Controller, CMD/STAT

0070, bit 7

1 bit

PIIX - Enable NMI

0070, bits 6:0

7 bits

PIIX - Real Time Clock, Address

0071

1 byte

PIIX - Real Time Clock, Data

0078

1 byte

Reserved - Brd. Config.

0079

1 byte

Reserved - Brd. Config. RD Only

0080 - 008F

16 bytes

PIIX - DMA Page Register

00A0

- 00A1

2 bytes

PIIX - Interrupt Controller 2

00C0 - 00DE

31 bytes

PIIX - DMA 2

00F0

1 byte

Reset Numeric Error

0170

- 0177

8 bytes

Secondary IDE Channel

Address (hex)

Size

Description

01F0 - 01F7

8 bytes

Primary IDE Channel

0278 - 027B

4 bytes

Parallel Port 2

02F8 - 02FF

8 bytes

On-Board Serial Port 2

0376

1 byte

Sec IDE Chan Cmd Port

0377

1 byte

Sec IDE Chan Stat Port

0378 - 037F

8 bytes

Parallel Port 1

03BC - 03BF

4 bytes

Parallel Port x

03E8 - 03EF

8 bytes

Serial Port 3

03F0 - 03F5

6 bytes

Floppy Channel 1

03F6

1 bytes

Pri IDE Channel Cmnd Port

03F7 (Write)

1 byte

Floppy Channel 1 Command

03F7, bit 7

1 bit

Floppy Disk Change Channel 1

03F7, bits 6:0

7 bits

Pri IDE Channel Status Port

03F8 - 03FF

8 bytes

On-Board Serial Port 1

LPT + 400h

8 bytes

ECP port, LPT + 400h

0CF8-0CFB*

4 bytes

PCI Config Addr Reg Enable

0CFC-0CFF*

4 bytes

PCI Config Data Reg

FF00-FF07

8 bytes

IDE Bus Master Reg.

Table C-1 and C-2. Advanced/ZP I/O Address Map

* Only accessible after PCI configuration space is enabled.

I/O Port 78 is reserved for BIOS use. I/O Port 79 is a read only port, the bit definitions are shown below.

Bit #

Description

Bit = 1

Bit = 0

 

 

 

 

0

Internal CPU Clock Freq. (Switch 6)

3/2x

2x

1

No Connect

 

 

2

No Connect

 

 

3

External CPU clock (Switch 7)

 

 

4

External CPU clock (Switch 8)

 

 

5

Setup Disable (Switch 5)

Enable access

Disable access

6

Clear CMOS (Switch 4)

Keep values

Clear values

7

Password Clear (Switch 3)

Keep password

Clear password

 

 

 

 

 

Figure C-3. I/O Port For Board Configuration

 

PCI CONFIGURATION SPACE MAP

The Triton chipset uses Configuration Mechanism 1 to access PCI configuration space. The PCI Configuration Address register is a 32-bit register located at CF8h, the PCI Configuration Data register is a 32-bit register located at CFCh. These registers are only accessable by full DWORD accesses. The table below lists the PCI bus and device numbers used by the baseboard.

Bus Number (hex)

Dev Number (hex)

Func. Number (hex)

Description

00

00

00

Intel 82437FX (TSC)

00

07

00

Intel 82371FB (PIIX) PCI/ISA bridge

00

07

01

Intel 82371FB (PIIX) IDE Bus Master

00

0F

 

PCI Expansion Slot 1

00

0D

 

PCI Expansion Slot 2

00

0E

 

PCI Expansion Slot 3

00

10

 

PCI Expansion Slot 4

 

Table

C-4. Advanced/ZP PCI

Config. Space Map

Advanced/ZP Technical Product Summary Page 17

Image 17
Contents Advanced/ZP Baby-AT Board Table of Contents ADVANCED/ZP Form Factor IntroductionMounting Hole Placement Baseboard DimensionsFront Panel Connectors JUMPERS/SWITCHESPerformance Upgrade Board Level FeaturesCPU Second Level CacheEDO Dram System MemoryExpansion Slots PCI 3.3 Volt Capabilities82437FX Triton System Controller TSC Peripheral Component Interconnect PCI Pciset82438FX Triton Data Path TDP 82371FB PCI ISA/IDE Accelerator PiixIDE Support Real Time CLOCK, Cmos RAM and BatteryNational Semiconductor 87306 Super I/O Controller Keyboard InterfaceBios Upgrades System BiosIrda Infrared Support Flash ImplementationPCI AUTO-CONFIGURATION Setup UtilityPower Management ISA Plug & PlayConnectors Security FeaturesConnections Power ConsumptionBack Panel Connections Watts CurrentSimm 1,2 Bank Simm 3,4 Bank Total System Memory Appendix a − User-Installable UpgradesRTC Battery Appendix B − Jumpers and Switches Recovery Boot Enable J1K1 Processor Voltage Regulation SwitchISA BUS Speed Switch PCI Configuration Space MAP Appendix E − Interrupts & DMA Channels Appendix D − Memory MapFront Panel Connectors − J2A1, J1B1 Appendix F − ConnectorsPower Supply Connectors Primary Power J9J1 FLoppy Connector j9c1 AT Keyboard Connector J8k1Serial Ports j7k1, j7k2 Parallel Port j9e1ISA Connectors J1G1, J2G1, J2G2, J3G1 PCI Connectors J4G1, J5G1, J5G2 Overview of the Setup Menu Screens Appendix G − Bios SetupOverview of the Setup Keys Main ScreenFloppy Options Submenu Hard Disk Configuration SubmenuIDE Translation Mode Initialization TimeoutMultiple Sector Setting Number of CylindersBoot Options Submenu Advanced Screen Peripheral Configuration SubmenuParallel Port Mode Serial Port 2 IR ModePCI IDE Interface Floppy InterfacePower Management Configuration Advanced Chipset Configuration SubmenuPlug and Play Configuration Submenu Security Screen Options Administrative and User Access ModesSecurity Screen Exit Screen Recovery Mode Appendix H − Bios RecoveryUsing the Upgrade Utility Beep Codes Appendix I − Error messages and Beep CodesError Messages ISA NMI Messages Plug and Play Error MessagesAppendix K − Reliability Data Appendix J − Environmental Standards

281786-002 specifications

The Intel 281786-002 is a highly regarded microprocessor that was part of Intel’s extensive portfolio of technology solutions. Originally released in the mid-1990s, it is recognized for its robust performance and advanced features, which catered to the needs of both personal computing and embedded systems.

One of the standout features of the Intel 281786-002 is its architecture, which includes a 32-bit data bus. This architecture allows for efficient data processing and memory management. The processor is built on a 0.6-micron process technology, contributing to reduced power consumption while enhancing overall performance. The chip operates at various clock speeds, typically ranging around 25MHz to 50MHz, allowing it to suit different applications and user requirements.

The Intel 281786-002 also boasts a sophisticated instruction set that supports a wide range of operations. This multi-functionality ensures that it can efficiently handle complex computations and multitasking scenarios. Its ability to execute instructions in parallel paves the way for better performance when running multiple applications simultaneously.

In terms of memory support, the processor is designed to interface effectively with both SRAM and DRAM technologies, accommodating a vast range of memory configurations, thereby enhancing flexibility for system designers. It is also compatible with both 16-bit and 32-bit data buses, making it versatile enough for use in various computing environments.

Another notable aspect of the Intel 281786-002 is its integrated security features. These allow for better data protection and integrity, making it a viable choice for systems requiring enhanced security protocols.

Furthermore, the microprocessor's reliability and stability have made it a preferred choice for embedded applications, network devices, and industrial systems. Its proven track record in various computing environments underscores Intel's commitment to quality and performance.

Additionally, the Intel 281786-002 supports various operating systems, providing flexibility in deployment across different computing platforms. This compatibility ensures that users can leverage existing software ecosystems without extensive modifications.

In conclusion, the Intel 281786-002 microprocessor encapsulates an amalgamation of performance, efficiency, and versatility. With its advanced features and robust architecture, it has played a significant role in shaping computing technology, making it a noteworthy component in Intel’s legacy of innovation.