Chapter 4 Software Development
4-3. USB Bits and Pieces
4-3-1. Device Controller Specifications
Table 4.3.1 summarizes the ML60851C specifications. For detailed device specifications, see the data sheet (Ml60851c.pdf).
Table 4.3.1. ML60851C Specifications
Data transfer speed | Full speed (12 Mb/s) only |
|
| |
| Data flow type | Endpoint | Direction | Buffer size |
| Control | EP0 | In | 8bytes |
Endpoint |
|
| Out | 8bytes |
specifications | Bulk | EP1 | In and out | 64 bytes × 2 |
|
| EP2 | In and out | 64bytes |
| Interrupt | EP3 | In | 8bytes |
| Isochronous | - | - | - |
DMA | ||||
Power supply | Vcc3=3.0 to3.6V, Vcc5=3.0 to 5.5V |
| ||
| Interface to | |||
Package |
|
|
4-3-2. Overview of ML60851C Operation
Figure 4.3.1 is a block diagram for ML60851C internals. The basic structure and operation are both simple. The receiver digitizes the inputs from the USB differential (D+/D-) data bus for the protocol engine. The phase-locked loop (DPLL) synchronizes the protocol engine with the bus clock.
The protocol engine executes the transactions. It analyzes the time-multiplexed packets over the USB bus looking for transactions including its assigned address. If it finds one, it analyzes the request from the host to the corresponding endpoint and then accesses the appropriate buffer for receiving from or transmitting to the USB bus.
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