Philips AN1651 manual VII. LOW Harmonic Distortion, THD vs Supply Voltage for 1VRMS Output

Page 7

Philips Semiconductors

Application note

 

 

 

Using the NE/SA5234 amplifier

AN1651

 

 

 

￿

 

 

* 3

 

2

 

 

 

 

 

 

 

 

2

(EQ. 8.)

 

 

)

 

￿

 

 

 

 

 

￿￿

(0.163x10

 

 

)

 

4KT @ 100 @ 10, 000

@

10

 

 

 

 

 

 

 

 

 

 

 

 

 

+ 1.6mV

 

K +

Boltzman￿sConstant

+

 

 

Joule

 

 

(EQ. 9.)

 

 

 

 

 

 

1.38x10* 23

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DegKelvin

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T +

 

300oK ;

BW + 10kHz

 

 

The amplified output signal = 1VRMS

 

 

 

 

S￿N

+

20 log

10

 

￿ 1

 

￿

 

 

 

(EQ. 10.)

 

 

 

 

 

 

 

 

 

 

 

 

 

1.6x10* 3

 

 

 

 

 

+

56dB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note that there is no effect from the second-stage thermally generated resistor noise due to the dominating effect of the first-stage amplified noise being much greater than the input noise of the second-stage. In addition the equivalent noise resistance of the second-stage is essentially the output resistance of the first-stage plus any series resistance used in coupling the two. This is the parallel combination of source resistance with input terminating or biasing resistance.

VII. LOW HARMONIC DISTORTION

The NE/SA5234 is extremely well adapted to reducing harmonic distortion as it relates to signal level and head room in audio and instrumentation circuits. Its unique internal design limits overdrive induced distortion to a level much below that experienced with other low voltage devices. As will be shown, the device is capable of operating over a wide supply range without causing the typical clipping distortion prevalent in companion operational amplifiers of this class.

A series of tests are shown to allow you to see just how resistant this device is to generating clipping distortion. Two different gain configurations were chosen to demonstrate this particular feature: unity gain non-inverting and 40dB non-inverting. The test set-up was as shown in Figure 9. The Harmonic Distortion analyzer used to make the measurements was a Storage Technology ST1700. The test frequency is 1kHz. For single supply operation, as previously covered, the amplifier should be biased to half the supply voltage to minimize distortion. Operation with dual supplies is simpler from a parts count standpoint as isolation capacitors are not required. Also the time constants associated with charging and discharging these is eliminated . Figure 10a,b and c shows the total harmonic distortion in percent versus input voltage level at 1kHz in VRMS for a non-inverting, unity gain NE5234. The load on the amplifier output is 10kΩ. Beginning with a supply voltage of 1.8V and an input level of 0.1VRMS, distortion is well below 0.2% ad remains there up to an input level just over 0.5VRMS (1.4VP-P) and increases to 0.4% for for 0.6VRMS (1.7VP-P).

For a 2V supply, the input levels increase to 0.65VRMS and

0.7VRMS, respectively for similar levels of distortion. With a supply voltage of 3.0V the input may be increased to 1VRMS before THD rises to 0.2% and 1.1VRMS for only 0.8% THD. Operation with a 600Ω load will only raise the THD figures slightly . By way of comparison, Figure 10c shows the greatly reduced dynamic range experienced when an LM324 is plugged into the test socket in place of the NE5234. Note that The THD is completely off scale for the case of 1.8 and 2.0V supply, then is barely usable for the low level end of the 3.0V supply example. Figure 11a, b, and c demonstrates the effect on harmonic distortion when closed loop gain is increased to 40dB in the non-inverting mode. It is evident that little increase in THD levels result. The graphs for the 2.0 and 3.0V supply case also include additional information on the effect of a 600Ω load on distortion.

3

UNITY GAIN

 

3

UNITY GAIN

 

0.8

UNITY GAIN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LM324

 

 

VCC = 1.8V

 

 

VCC = 2.0V

 

 

 

 

 

 

 

 

 

 

VCC = 3.0V

NE5234

 

 

 

 

 

 

 

0

 

 

0

 

 

0

 

 

0.1

V

1.0

0.1

V

1.1

0.1

V

1.1

 

a.

 

 

b.

 

 

c.

SL00638

Figure 10. THD vs Supply Voltage for 1VRMS Output

2

 

 

2.5

 

 

 

 

 

 

 

V

= 2V

3

 

 

 

VCC = 3.0V

 

 

THD for VCC = 1.8V

 

 

 

RL = 10k/600Ω

 

 

 

GAIN = 40dB

 

 

 

 

-RL= 10k/600Ω

 

 

 

 

 

 

 

 

 

 

 

 

RL = 600Ω

P

RL = 600Ω

RL = 10kΩ

 

 

 

 

 

 

 

 

RL = 10kΩ

 

 

 

RL = 10kΩ

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

0.1

V

0.9

0

 

 

0

 

 

 

 

0.1

V

1.1

0.1

V

1.1

c.

 

 

a.

 

 

b.

 

SL00639

Figure 11. THD vs Load

1991 Oct

7

Image 7
Contents AN1651 II. Detailed Description SummaryInput Stage Intermediate Amplifier and Output Stage Figure III. CharacteristicsInternal Frequency Compensation NE5234 Closed Loop Gain vs Frequency Guide Lines for Minimizing Noise IV. Noise Referred to the InputAmplified Noise = 160μVRMS VI. Multiple Stage ConsiderationsTHD vs Supply Voltage for 1VRMS Output VII. LOW Harmonic DistortionIX. LOOP-GAIN VIII. GAIN-BANDWIDTH VS Closed Loop FRE- Quency ResponseSlew Rate Response Single Supply Operation XI. ProceduresNon-Inverting Stage Biasing Strain Gauge Amplifier Instrumentation Applications ExamplesTo 20mA Current Loop Communications and Audio Active filtersActive Filters Fiber Optic Receiver for Low Frequency Data Figure NE578 ReferencesNE570/571/SA571 System Level Half Bridge Servo

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