Philips ISP1362 manual Figures

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Philips Semiconductors

ISP1362 Linux Stack User’s Guide

Figures

 

Figure 2-1: ISP1362 Linux Stack Architecture

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Figure 3-1: ISP1362 Linux Setup Example

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Figure 3-2 Development setup for Intel PXA250 Based Accelent IDP

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Figure 3-3 Development setup for Intel PXA250 Based Accelent IDP

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Figure 4-1: Host Stack Evaluation Example Setup

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Figure 4-2: Device Stack Evaluation Setup

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Figure 4-3: OTG Stack Evaluation Setup

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Figure 4-4: OTG Mass Storage Application in the IDLE State Snapshot

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Figure 4-5: OTG Mass Storage Application in the HOST State Snapshot

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Figure 4-6: OTG Application File Selection Snapshot

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Figure 4-7: OTG Application as a Device Snapshot

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Figure 4-8 OTG B device accessing remote OTG mass storage device files

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Figure 4-9 OTG B closing the session after connected device data access

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Figure 4-10 Operations with OTG A and B devices

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Tables

 

Table 4-1: OTG Command Line tool Options

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Table 5-1: Global Compilation Flags

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Table 5-2: Host Controller Driver Compilation Flags

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Table 6-1: Top-Level Directory Contents

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Table 6-2: Contents of the host Directory

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Table 6-3: Contents of the phci Directory

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Table 6-4: Contents of the device Directory

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Table 6-5: Contents of the pdc Directory

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Table 6-6: Contents of the devmscd Directory

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Table 6-7: Contents of the diskemu Directory

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Table 6-8: Contents of the otg Directory

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Table 6-9: Contents of the hal Directory

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Table 6-10: Contents of the x86pci Directory

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Table 6-11: Contents of the appl Directory

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Table 6-12: Contents of the otgmsdemo Directory

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Table 6-13: Contents of the tools Directory

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Table 6-14: Contents of the objs Directory

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The names of actual companies and products mentioned herein may be the trademarks of their respective owners. All other names, products, and trademarks are the property of their respective owners.

UM10012-_2

 

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

User’s Guide

Rev. 1.2—July 2003

5 of 34

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Contents Version Date Description Author UM100122 ISP1362 Linux StackDisclaimer Contents Philips Semiconductors Figures Concept IntroductionDevice Stack Core ModulesHost Stack Porting Modules InstallationApplication Modules Setting Up the ISP1362 Evaluation Kit Setting Up the PC and OSSetting Up the Software ISP1362 PCI Evaluation KitAny other USB options that need to be enabled ISP1362 Add-on Card for Intel PXA250 based Accelent IDP Rev Setting Up the ISP1362 Add-On CardHost PC Setup #tar Ixvf arm-linux-gcc2953.tar.bz2 USB Catc USB Kawth Accelent IDP Rev 04 Target Setup#cd /home/1362/objs #./imod Development setup for Intel PXA250 Based Accelent IDP Armtoolchaintar.bz2 Linux Kernel Configuration Accelent IDP Setup Loading the Stack Operating the ISP1362 Linux StackLoading the Stack Unloading the StackUnloading the Stack Initializing the StackClosing the ISP1362 Stack ISP1362 Host StackISP1362 Device Stack Host Stack Evaluation Example SetupISP1362 OTG Stack OTG Stack Evaluation SetupOTG Mass Storage Application in the Idle State Snapshot OTG Application File Selection Snapshot Unloads OTG modules Option DescriptionOTG B device accessing remote OTG mass storage device files OTG B closing the session after connected device data access 10 Operations with OTG a and B devices Compilation Flags ConfigurationGlobal Compilation Flag DescriptionTop-Level Directory Inside the ISP1362 Linux StackHost DevicePdc OtgDevmscd DiskemuAppl Hal1. x86pci OtgmsdemoTools ReferencesObjs Koninklijke Philips Electronics N.V Philips Semiconductors

ISP1362 specifications

The Philips ISP1362 is a highly versatile USB controller that serves as a key component in various electronics and computing devices. Known for its robust features and efficient design, the ISP1362 has gained popularity in applications ranging from consumer electronics to embedded systems.

One of the standout features of the ISP1362 is its support for both USB 1.1 and USB 2.0 standards. This dual compatibility allows devices utilizing the ISP1362 to connect seamlessly with a wide range of peripherals, ensuring flexibility for developers and users alike. The chip can efficiently handle data transfer rates of up to 12 Mbps in USB 1.1 mode and 480 Mbps in USB 2.0 mode, catering to fast data exchange demands in modern applications.

The ISP1362 integrates an advanced architecture with a built-in microcontroller unit, reducing the need for additional external components. This facilitates easier design and integration into various embedded systems, simplifying the development process for engineers. Its compact design is optimized for low power consumption, making it an ideal choice for battery-operated devices.

In terms of technological features, the ISP1362 is equipped with enhanced error detection capabilities. This ensures accuracy and reliability during data transmission, which is crucial for maintaining data integrity, especially in applications demanding high availability and performance.

The chip also incorporates a flexible pipeline for USB protocol handling, which enables it to manage multiple data streams efficiently. This feature is particularly beneficial in complex systems where various peripherals may be communicating simultaneously, allowing for improved system responsiveness and overall performance.

Moreover, the ISP1362 supports the use of different USB classes, including Mass Storage and Human Interface Devices (HID), providing developers with the versatility needed for a broad spectrum of applications. Its compliance with industry standards ensures compatibility and reduces integration times, making it a preferred choice for many manufacturers.

Overall, the Philips ISP1362 stands out with its combination of high-speed connectivity, power efficiency, and robust functionality, making it an excellent option for engineers and developers looking to implement USB connectivity in their designs. Whether in consumer electronics, automotive applications, or industrial devices, the ISP1362 continues to be a reliable USB interface solution that meets modern performance demands.