EM78M611E
Universal Serial Bus Series Microcontroller
8.2.3.8IOCE (Special Function Control Register) Default Value: (0B_1101_0111)
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
/Dual clock | /WUE | WTE | RUN | Device_Resume | /PU8 | /PU6 | /PU5 |
IOCE [0, 1, 2] Port 5, Port 6, and Port 8
1 : Disable
IOCE [3] Setting this bit will allow the UDC to execute resume signaling. This bit is set by firmware to generate a signal to
NOTE
IOCE[3]: Device_Resume bit
In EM78M611, this bit is always ‘0’. It is not for use.
In EM78M611E, this bit is O.K. for use.
IOCE [4] Run bit. This bit can be cleared by firmware and set during
0 : Sleep mode. The EM78M611E is in power down mode.
1 : Run mode. The EM78M611E is working normally.
IOCE [5] Watchdog Timer enable bit. The bit disables/enables the Watchdog Timer.
0 : Disable WDT
1 : Enable WDT
IOCE [6] Enable the
0 : Enable the
1 : Disable the
IOCE [7] Dual clock Control bit. This bit is used to select the frequency of system clock. When this bit is cleared, the MCU will run on very low frequency for power saving and the UDC will stop working.
0 : Selects to run on slow frequency
1 : Selects EM78M611E to run on normal frequency
20 • | Product Specification (V1.1) 11.22.2006 |
(This specification is subject to change without further notice)