Fujitsu MHV2080AT, MHV2100AT, MHV2120AT, MHV2040AT Terminating an Ultra DMA data in burst, Dmarq

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Interface

2)The device shall pause an Ultra DMA burst by not generating DSTROBE edges.

NOTE - The host shall not immediately assert STOP to initiate Ultra DMA burst termination when the device stops generating STROBE edges. If the device does not negate DMARQ, in order to initiate ULTRA DMA burst termination, the host shall negate HDMARDY- and wait tRP before asserting STOP.

3)The device shall resume an Ultra DMA burst by generating a DSTROBE edge.

b)Host pausing an Ultra DMA data in burst

1)The host shall not pause an Ultra DMA burst until at least one data word of an Ultra DMA burst has been transferred.

2)The host shall pause an Ultra DMA burst by negating HDMARDY-.

3)The device shall stop generating DSTROBE edges within tRFS of the host negating HDMARDY-.

4)If the host negates HDMARDY- within tSR after the device has generated a DSTROBE edge, then the host shall be prepared to receive zero or one

additional data words. If the host negates HDMARDY- greater than tSR after the device has generated a DSTROBE edge, then the host shall be prepared to receive zero, one or two additional data words. The

additional data words are a result of cable round trip delay and tRFS timing for the device.

5)The host shall resume an Ultra DMA burst by asserting HDMARDY-.

5.5.3.4Terminating an Ultra DMA data in burst

a)Device terminating an Ultra DMA data in burst

The following steps shall occur in the order they are listed unless otherwise specifically allowed (see 5.6.3.5 and 5.6.3.2 for specific timing requirements):

1)The device shall initiate termination of an Ultra DMA burst by not generating DSTROBE edges.

2)The device shall negate DMARQ no sooner than tSS after generating the last DSTROBE edge. The device shall not assert DMARQ again until after the Ultra DMA burst is terminated.

3)The device shall release DD (15:0) no later than tAZ after negating

DMARQ.

4)The host shall assert STOP within tLI after the device has negated DMARQ. The host shall not negate STOP again until after the Ultra DMA burst is terminated.

5)The host shall negate HDMARDY- within tLI after the device has negated DMARQ. The host shall continue to negate HDMARDY- until the Ultra DMA burst is terminated. Steps (4) and (5) may occur at the same time.

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C141-E218

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Contents MHV2120AT, MHV2100AT, MHV2080AT MHV2060AT, MHV2040AT Disk Drive Product ManualFor Safe Operation Handling of This ManualRevision History This page is intentionally left blank Preface Overview of ManualConventions for Alert Messages Operating EnvironmentConventions Liability Exception This page is intentionally left blank Important Alert Items Important Alert MessagesDamage Interface cable connection This page is intentionally left blank Disk Drive Maintenance Manual Manual OrganizationDisk Drive Product Manual This page is intentionally left blank Contents Installation Conditions Theory of Device OperationContents Interface101 Write Multiple EXT X’39’ Option customizing Operations Glossary GL-1 Acronyms and Abbreviations AB-1 Index IN-1 Illustrations FiguresExecution example of Read Multiple command Surface temperature measurement points and standard Tables25 Relationship between combination of Identifier This page is intentionally left blank Device Overview Features Functions and performanceAdaptability Error correction and retry by ECC High resistance against shockConnection to ATA interface Data bufferDevice Specifications Specifications summarySpecifications 1 Specifications 2 Model and product numberExamples of model names and product numbers Power Requirements Input VoltageRipple Current Requirements and Power Dissipation Current and power dissipationEnvironmental Specifications Current fluctuation Typ. at +5 V when power is turned onPower on/off sequence Environmental specificationsAcoustic noise specification Shock and vibration specificationAcoustic Noise Shock and VibrationService life Data assurance in the event of power failureReliability Mean time between failures MtbfError Rate Unrecoverable read errorPositioning error Media DefectsAdvanced Power Management Advanced Power Management Advanced Power ManagementThis page is intentionally left blank Device Configuration Device Configuration System Configuration ATA interface2 1 drive connection Read/write circuit2 drives configuration 3 2 drives connectionInstallation Conditions Dimensions DimensionsMounting Integration Guidance C141-E144Orientation Frame Limitation of mountingPCA Location of breather Ambient temperature Service area Handling cautionsHandling cautions Device connector Cable ConnectionsCable connector specifications Cable connector specificationsDevice connection FCIJumper Settings Power supply connector CN1Location of setting jumpers Factory default setting Master drive-slave drive settingCsel setting 14 Csel settingPower up in standby setting 16 Example 2 of cable selectTheory of Device Operation Outline SubassembliesDisk SpindleCircuit Configuration Air filterServo circuit Spindle motor driver circuitPower supply configuration PCA Power-on Sequence Power-on operation sequenceSelf-calibration contents Self-calibrationCommand processing during self-calibration Execution timing of self-calibrationRead/write Circuit Read/write preamplifier PreAMPWrite circuit Write precompensationRead circuit AGC circuitProgrammable filter circuit Digital PLL circuit FIR circuitD converter circuit Viterbi detection circuitServo Control Servo control circuitPower amplifier Microprocessor unit MPUServo burst capture circuit A converter DACDriver circuit VCM current sense resistor CSRData-surface servo format Inner guard bandData area Outer guard bandPhysical sector servo configuration on disk surface Servo frame format Actuator motor control Operation to move the head to the reference cylinderSeek operation Track following operationStart mode Acceleration modeStable rotation mode Spindle motor controlThis page is intentionally left blank Interface Interface signals Physical InterfaceSignal assignment on the connector Signal assignment on the interface connectorDA1 PDIAG-, Cblid DA0 DA2 Dasp GNDMstr DiowStop DiorPdiag CblidDasp IordyLogical Interface 1 I/O registers I/O registersDA2 DA1 DA0 Command block registers Error register X’1F1’Data register X’1F0’ UNC IdnfFeatures register X’1F1’ SET Multiple ModeSector Count register X’1F2’ Sector Number register X’1F3’ Cylinder Low register X’1F4’Cylinder High register X’1F5’ Device/Head register X’1F6’ DEV HS3 HS2 HS1 HS0Status register X’1F7’ BSYInterface Command register X’1F7’ Control block registersAlternate Status register X’3F6’ Host Commands Command code and parametersDevice Control register X’3F6’ HOB SrstCommand code and parameters 1 Parameter UsedCommand code and parameters 2 EXT Write Multiple FUA EXT Flush Cache EXTHost Commands Command descriptions Host Commands Recalibrate X’10’ to X’1F’ Read Sectors X’20’ or X’21’ MSBEnd head No. / LBA MSB Write Sectors X’30’ or X’31’ 1F7HST Status information 1F6HDH Write Verify X’3C’ Read Verify Sectors X’40’ or X’41’ Seek X’70’ to X’7F’ Execute Device Diagnostic X’90’ Diagnostic codeHost Commands Initialize Device Parameters X’91’ Download Microcode X’92’ Operation of Download Microcode Standby Immediate X’94’ or X’E0’ Unload Feature Unload Immediate Command Host Commands Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Interface Check Power Mode X’98’ or X’E5’ ’FF’Sleep X’99’ or X’E6’ Smart X’B0 Features register values subcommands and functions 1 Features register values subcommands and functions 2 Smart Enable OperationsSmart Disable Operations Smart Read LOGFeatures register values subcommands and functions 3 ’DB’ Smart ENABLE/DISABLE Auto OFF-LINESmart Return Status Host Commands Format of device attribute value data 1FFFormat of insurance failure threshold value data Data format version number Attribute IDStatus Flag Current attribute valueAttribute value for the worst case so far Raw attribute value10 Off-line data collection status Self-test execution status11 Self-test execution status Off-line data collection capability 12 Off-line data collection capabilityFailure prediction capability flag 13 Failure prediction capability flagError logging capability 14 Error logging capabilityCheck sum Insurance failure thresholdSmart error logging 16 Data format of Smart Summary Error Log Command data structure Error data structureTotal number of drive errors 17 Data format of Smart Comprehensive Error LogSmart self-test 18 Smart self-test log data format1FC Self-test number19 Selective self-test log data structure Test spanCurrent LBA under test Current span under testFeature flags 20 Selective self-test feature flagsSelective self-test pending time min Device Configuration XB1 Device Configuration RestoreDevice Configuration Freeze Device Configuration IdentifyDevice Configuration Restore FR = C0h Device Configuration Freeze Lock FR = C1hDevice Configuration Identify FR = C2h Device Configuration SET FR = C3hInterface 21 Device Configuration Identify data structure Interface Execution example of Read Multiple command Read Multiple X’C4’MSB Write Multiple X’C5’ Interface SET Multiple Mode X’C6’ Interface Read DMA X’C8’ or X’C9’ End head No. / LBA MSB Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ 22 Information to be read by Identify Device command 1 ’3FFF’22 Information to be read by Identify Device command 2 Word Command without interrupt supports 2, 4, 8 and 16 sectors = Supports the Host Protected Area feature set = Supports the CFA Compact Flash Association feature set Interface Host Commands Interface Host Commands Word Bit Reserved Security level High, 1 Maximum SET Features X’EF’ 23 Features register values and settable modes’BB’ ’CC’Data Transfer Mode Advanced Power Management APM Automatic Acoustic Management AAM 24 Contents of Security SET Password data At command issuance I-O register contents 1F7hCM When the master password is selected When the user password is selectedSecurity UNLOCKX’F2’ Interface Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ At command issuance I-O register contents 1F7hCM 26 Contents of security password Interface Read Native MAX Address X’F8’ SET MAX X’F9’ SET MAX AddressSET MAX SET Password FR = 01h SET MAX Lock FR = 02h SET MAX Unlock FR = 03h SET MAX Freeze Lock FR = 04h Host Commands Read Sectors EXT X’24’ Option customizing Description Read DMA EXT X’25’ Option customizing Description Error reporting conditions Read Multiple EXT X’29’ Option customizing Description Read LOG EXT X2F Optional command Customize Description Host Commands Write Sectors EXT X’34’ Option customizing Description Write DMA EXT X’35’ Option customizing Description SET MAX Address EXT X’37’ Option customizing Description SET MAX LBA Write Multiple EXT X’39’ Option customizing Description Write DMA FUA EXT X’3D’ Option customizing Description Write LOG EXT X’3F’ Optional command Customize Description Host Commands Read Verify Sectors EXT X’42 Option customizing Description Write Multiple FUA EXT X’CE’ Option customizing Description Flush Cache EXT X’EA’ Option customizing Description Error posting 27 Command code and parameters 127 Command code and parameters 2 Command Protocol PIO Data transferring commands from device to hostExecute Device Diagnostic Initialize Device Parameters Read Sectors Command protocol Protocol for command abort PIO Data transferring commands from host to device Write Sectors command protocol Commands without data transfer Other commands DMA data transfer commandsRead Multiple EXT Write Multiple EXT/FUA EXT Sleep Read DMA EXT Write DMA EXT/FUA EXT Indentify Device DMANormal DMA data transfer Ultra DMA Feature Set OverviewPhases of operation Ultra DMA data in commandsInitiating an Ultra DMA data in burst Pausing an Ultra DMA data in burst Data in transferTerminating an Ultra DMA data in burst Ultra DMA Feature Set Interface Ultra DMA data out commands Initiating an Ultra DMA data out burstPausing an Ultra DMA data out burst Data out transferTerminating an Ultra DMA data out burst Interface Ultra DMA CRC rules Series termination required for Ultra DMA 28 Recommended series termination for Ultra DMADIOR-HDMARDY-HSTROBE DIOW-STOPTiming PIO data transferPIO data transfer timing 10 Multiword DMA data transfer timing mode Multiword data transferUltra DMA data transfer 11 Initiating an Ultra DMA data in burstName Mode Comment Strobe29 Ultra DMA data burst timing requirements 2 MIN MAXMode Name Comment 30 Ultra DMA sender and recipient timing requirementsSustained Ultra DMA data in burst Dstrobe at deviceDD150 at device Dstrobe at host DD150 at hostHost pausing an Ultra DMA data in burst DmarqDmack HdmardyDevice terminating an Ultra DMA data in burst StopHost terminating an Ultra DMA data in burst HostDA0, DA1, DA2 CS0, CS1 16 Initiating an Ultra DMA data out burst Sustained Ultra DMA data out burst Hstrobe at host DD150 at hostHstrobe at device DD150 at device Device pausing an Ultra DMA data out burst Device DMACK- host Stop host DDMARDY- deviceHstrobe host DD150 Host Host terminating an Ultra DMA data out burst 19 Host terminating an Ultra DMA data out burstDevice terminating an Ultra DMA data out burst Dmarq device DMACK- hostDD150 Host Power-on and reset Master and slave devices are present 2-drives configurationOnly master device is present Operations Device Response to the Reset Response to power-onResponse to hardware reset Response to power-onResponse to hardware reset Response to software reset Response to software resetResponse to diagnostic command Response to diagnostic commandPower Save Power save modeActive mode Active idle modeStandby mode Sleep modePower commands Defect ProcessingSpare area Alternating processing for defective sectors Sector slip processingTrack slip processing Automatic alternating processing Automatic alternating processingRead-ahead Cache Data buffer structure8MB buffer 8,388,608 bytes Commands that are targets of caching Caching operationData that is a target of caching Invalidating caching-target dataSmart Using the read segment buffer Miss-hitSequential hit Full hit Partial hit Command that are targets of caching Write CacheCache operation Invalidation of cached dataStatus report in the event of an error Reset responseCaching function when power supply is turned on Enabling and disablingWrite Cache This page is intentionally left blank Glossary Power save mode Rotational delayPIO Programmed input-output PositioningStatus VCMThis page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank Index AAMIndex Host terminating ultra DMA data Read Sectors Command Read Native MAX AddressSurface temperature measurement This page is intentionally left blank Comment Form JapanThis page is intentionally left blank MHV2120AT, MHV2100AT, MHV2080AT, MHV2060AT, MHV2040AT C141-E218-01ENThis page is intentionally left blank

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