Fujitsu MHV2100AT, MHV2080AT, MHV2120AT, MHV2040AT, MHV2060AT manual Mstr, Diow, Stop, Dior, Hdmardy

Page 80

Interface

[Signal]

[I/O]

 

[Description]

ENCSEL

I

This signal is used to set master/slave using the CSEL signal (pin 28).

 

 

Pins B and D Open: Sets master/slave using the CSEL signal is

 

 

 

disabled.

 

 

 

Short: Sets master/slave using the CSEL signal is

 

 

 

enabled.

MSTR-

I

MSTR, I, Master/slave setting

 

 

Pin A, B, C, D open: Master setting

 

 

Pin A, B Short:

Slave setting

PUS-

I

When pin C is grounded, the drive does not spin up at power on.

RESET-

I

Reset signal from the host. This signal is low active and is asserted

 

 

for a minimum of 25 ∝s during power on.

DATA 0-15

I/O

Sixteen-bit bi-directional data bus between the host and the device.

 

 

These signals are used for data transfer

DIOW-

I

Signal asserted by the host to write to the device register or data port.

STOP

I

DIOW- must be negated by the host before starting the Ultra DMA

 

 

transfer. The STOP signal must be negated by the host before data is

 

 

transferred during the Ultra DMA transfer. During data transfer in

 

 

Ultra DMA mode, the assertion of the STOP signal asserted by the

 

 

host later indicates that the transfer has been suspended.

DIOR-

I

Read strobe signal from the host to read the device register or data

 

 

port

 

HDMARDY-

I

Flow control signal for Ultra DMA data In transfer (READ DMA

 

 

command). This signal is asserted by the host to inform the device

 

 

that the host is ready to receive the Ultra DMA data In transfer. The

 

 

host can negate the HDMARDY- signal to suspend the Ultra DMA

 

 

data In transfer.

 

HSTROBE

I

Data Out Strobe signal from the host during Ultra DMA data Out

 

 

transfer (WRITE DMA command). Both the rising and falling edges

 

 

of the HSTROBE signal latch data from Data 15-0 into the device.

 

 

The host can suspend the inversion of the HSTROBE signal to

 

 

suspend the Ultra DMA data Out transfer.

INTRQ

O

Interrupt signal to the host.

 

 

This signal is negated in the following cases:

−

−

−

−

−

Assertion of RESET- signal

Reset by SRST of the Device Control register

Write to the command register by the host

Read of the status register by the host

Completion of sector data transfer

(without reading the Status register)

The signal output line has a high impedance when no devices are selected or interruption is disabled.

5-4

C141-E218

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Contents MHV2120AT, MHV2100AT, MHV2080AT MHV2060AT, MHV2040AT Disk Drive Product ManualFor Safe Operation Handling of This ManualRevision History This page is intentionally left blank Preface Overview of ManualConventions Conventions for Alert MessagesOperating Environment Liability Exception This page is intentionally left blank Damage Interface cable connection Important Alert ItemsImportant Alert Messages This page is intentionally left blank Disk Drive Product Manual Disk Drive Maintenance ManualManual Organization This page is intentionally left blank Contents Installation Conditions Theory of Device OperationContents Interface101 Write Multiple EXT X’39’ Option customizing Operations Glossary GL-1 Acronyms and Abbreviations AB-1 Index IN-1 Illustrations FiguresExecution example of Read Multiple command Surface temperature measurement points and standard Tables25 Relationship between combination of Identifier This page is intentionally left blank Device Overview Adaptability FeaturesFunctions and performance Error correction and retry by ECC High resistance against shockConnection to ATA interface Data bufferSpecifications 1 Device SpecificationsSpecifications summary Examples of model names and product numbers Specifications 2Model and product number Ripple Power RequirementsInput Voltage Current Requirements and Power Dissipation Current and power dissipationEnvironmental Specifications Current fluctuation Typ. at +5 V when power is turned onPower on/off sequence Environmental specificationsAcoustic noise specification Shock and vibration specificationAcoustic Noise Shock and VibrationService life Data assurance in the event of power failureReliability Mean time between failures MtbfError Rate Unrecoverable read errorPositioning error Media DefectsAdvanced Power Management Advanced Power Management Advanced Power ManagementThis page is intentionally left blank Device Configuration Device Configuration System Configuration ATA interface2 1 drive connection Read/write circuit2 drives configuration 3 2 drives connectionInstallation Conditions Dimensions DimensionsOrientation MountingIntegration Guidance C141-E144 PCA FrameLimitation of mounting Location of breather Ambient temperature Service area Handling cautionsHandling cautions Device connector Cable ConnectionsCable connector specifications Cable connector specificationsDevice connection FCILocation of setting jumpers Jumper SettingsPower supply connector CN1 Factory default setting Master drive-slave drive settingCsel setting 14 Csel settingPower up in standby setting 16 Example 2 of cable selectTheory of Device Operation Outline SubassembliesDisk SpindleCircuit Configuration Air filterServo circuit Spindle motor driver circuitPower supply configuration PCA Power-on Sequence Power-on operation sequenceSelf-calibration contents Self-calibrationCommand processing during self-calibration Execution timing of self-calibrationRead/write Circuit Read/write preamplifier PreAMPWrite circuit Write precompensationProgrammable filter circuit Read circuitAGC circuit Digital PLL circuit FIR circuitD converter circuit Viterbi detection circuitServo Control Servo control circuitPower amplifier Microprocessor unit MPUServo burst capture circuit A converter DACDriver circuit VCM current sense resistor CSRData-surface servo format Inner guard bandData area Outer guard bandPhysical sector servo configuration on disk surface Servo frame format Actuator motor control Operation to move the head to the reference cylinderSeek operation Track following operationStart mode Acceleration modeStable rotation mode Spindle motor controlThis page is intentionally left blank Interface Interface signals Physical InterfaceSignal assignment on the connector Signal assignment on the interface connectorDA1 PDIAG-, Cblid DA0 DA2 Dasp GNDMstr DiowStop DiorPdiag CblidDasp IordyLogical Interface DA2 DA1 DA0 1 I/O registersI/O registers Command block registers Error register X’1F1’Data register X’1F0’ UNC IdnfSector Count register X’1F2’ Features register X’1F1’SET Multiple Mode Cylinder High register X’1F5’ Sector Number register X’1F3’Cylinder Low register X’1F4’ Device/Head register X’1F6’ DEV HS3 HS2 HS1 HS0Status register X’1F7’ BSYInterface Alternate Status register X’3F6’ Command register X’1F7’Control block registers Host Commands Command code and parametersDevice Control register X’3F6’ HOB SrstCommand code and parameters 1 Parameter UsedCommand code and parameters 2 EXT Write Multiple FUA EXT Flush Cache EXTHost Commands Command descriptions Host Commands Recalibrate X’10’ to X’1F’ Read Sectors X’20’ or X’21’ MSBEnd head No. / LBA MSB Write Sectors X’30’ or X’31’ 1F7HST Status information 1F6HDH Write Verify X’3C’ Read Verify Sectors X’40’ or X’41’ Seek X’70’ to X’7F’ Execute Device Diagnostic X’90’ Diagnostic codeHost Commands Initialize Device Parameters X’91’ Download Microcode X’92’ Operation of Download Microcode Standby Immediate X’94’ or X’E0’ Unload Feature Unload Immediate Command Host Commands Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Interface Check Power Mode X’98’ or X’E5’ ’FF’Sleep X’99’ or X’E6’ Smart X’B0 Features register values subcommands and functions 1 Features register values subcommands and functions 2 Smart Enable OperationsSmart Disable Operations Smart Read LOGSmart Return Status Features register values subcommands and functions 3’DB’ Smart ENABLE/DISABLE Auto OFF-LINE Host Commands Format of insurance failure threshold value data Format of device attribute value data1FF Data format version number Attribute IDStatus Flag Current attribute valueAttribute value for the worst case so far Raw attribute value11 Self-test execution status 10 Off-line data collection statusSelf-test execution status Off-line data collection capability 12 Off-line data collection capabilityFailure prediction capability flag 13 Failure prediction capability flagError logging capability 14 Error logging capabilityCheck sum Insurance failure thresholdSmart error logging 16 Data format of Smart Summary Error Log Command data structure Error data structureTotal number of drive errors 17 Data format of Smart Comprehensive Error LogSmart self-test 18 Smart self-test log data format1FC Self-test number19 Selective self-test log data structure Test spanCurrent LBA under test Current span under testSelective self-test pending time min Feature flags20 Selective self-test feature flags Device Configuration XB1 Device Configuration RestoreDevice Configuration Freeze Device Configuration IdentifyDevice Configuration Restore FR = C0h Device Configuration Freeze Lock FR = C1hDevice Configuration Identify FR = C2h Device Configuration SET FR = C3hInterface 21 Device Configuration Identify data structure Interface Execution example of Read Multiple command Read Multiple X’C4’MSB Write Multiple X’C5’ Interface SET Multiple Mode X’C6’ Interface Read DMA X’C8’ or X’C9’ End head No. / LBA MSB Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ 22 Information to be read by Identify Device command 1 ’3FFF’22 Information to be read by Identify Device command 2 Word Command without interrupt supports 2, 4, 8 and 16 sectors = Supports the Host Protected Area feature set = Supports the CFA Compact Flash Association feature set Interface Host Commands Interface Host Commands Word Bit Reserved Security level High, 1 Maximum SET Features X’EF’ 23 Features register values and settable modes’BB’ ’CC’Data Transfer Mode Advanced Power Management APM Automatic Acoustic Management AAM 24 Contents of Security SET Password data At command issuance I-O register contents 1F7hCM Security UNLOCKX’F2’ When the master password is selectedWhen the user password is selected Interface Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ At command issuance I-O register contents 1F7hCM 26 Contents of security password Interface Read Native MAX Address X’F8’ SET MAX X’F9’ SET MAX AddressSET MAX SET Password FR = 01h SET MAX Lock FR = 02h SET MAX Unlock FR = 03h SET MAX Freeze Lock FR = 04h Host Commands Read Sectors EXT X’24’ Option customizing Description Read DMA EXT X’25’ Option customizing Description Error reporting conditions Read Multiple EXT X’29’ Option customizing Description Read LOG EXT X2F Optional command Customize Description Host Commands Write Sectors EXT X’34’ Option customizing Description Write DMA EXT X’35’ Option customizing Description SET MAX Address EXT X’37’ Option customizing Description SET MAX LBA Write Multiple EXT X’39’ Option customizing Description Write DMA FUA EXT X’3D’ Option customizing Description Write LOG EXT X’3F’ Optional command Customize Description Host Commands Read Verify Sectors EXT X’42 Option customizing Description Write Multiple FUA EXT X’CE’ Option customizing Description Flush Cache EXT X’EA’ Option customizing Description Error posting 27 Command code and parameters 127 Command code and parameters 2 Execute Device Diagnostic Initialize Device Parameters Command ProtocolPIO Data transferring commands from device to host Read Sectors Command protocol Protocol for command abort PIO Data transferring commands from host to device Write Sectors command protocol Commands without data transfer Other commands DMA data transfer commandsRead Multiple EXT Write Multiple EXT/FUA EXT Sleep Read DMA EXT Write DMA EXT/FUA EXT Indentify Device DMANormal DMA data transfer Ultra DMA Feature Set OverviewInitiating an Ultra DMA data in burst Phases of operationUltra DMA data in commands Pausing an Ultra DMA data in burst Data in transferTerminating an Ultra DMA data in burst Ultra DMA Feature Set Interface Ultra DMA data out commands Initiating an Ultra DMA data out burstPausing an Ultra DMA data out burst Data out transferTerminating an Ultra DMA data out burst Interface Ultra DMA CRC rules Series termination required for Ultra DMA 28 Recommended series termination for Ultra DMADIOR-HDMARDY-HSTROBE DIOW-STOPPIO data transfer timing TimingPIO data transfer 10 Multiword DMA data transfer timing mode Multiword data transferUltra DMA data transfer 11 Initiating an Ultra DMA data in burstName Mode Comment Strobe29 Ultra DMA data burst timing requirements 2 MIN MAXMode Name Comment 30 Ultra DMA sender and recipient timing requirementsSustained Ultra DMA data in burst Dstrobe at deviceDD150 at device Dstrobe at host DD150 at hostHost pausing an Ultra DMA data in burst DmarqDmack HdmardyDevice terminating an Ultra DMA data in burst StopDA0, DA1, DA2 CS0, CS1 Host terminating an Ultra DMA data in burstHost 16 Initiating an Ultra DMA data out burst Hstrobe at device DD150 at device Sustained Ultra DMA data out burstHstrobe at host DD150 at host Hstrobe host DD150 Host Device pausing an Ultra DMA data out burstDevice DMACK- host Stop host DDMARDY- device Host terminating an Ultra DMA data out burst 19 Host terminating an Ultra DMA data out burstDD150 Host Device terminating an Ultra DMA data out burstDmarq device DMACK- host Only master device is present Power-on and resetMaster and slave devices are present 2-drives configuration Operations Device Response to the Reset Response to power-onResponse to hardware reset Response to power-onResponse to hardware reset Response to software reset Response to software resetResponse to diagnostic command Response to diagnostic commandPower Save Power save modeActive mode Active idle modeStandby mode Sleep modeSpare area Power commandsDefect Processing Track slip processing Alternating processing for defective sectorsSector slip processing Automatic alternating processing Automatic alternating processing8MB buffer 8,388,608 bytes Read-ahead CacheData buffer structure Commands that are targets of caching Caching operationData that is a target of caching Invalidating caching-target dataSmart Using the read segment buffer Miss-hitSequential hit Full hit Partial hit Command that are targets of caching Write CacheCache operation Invalidation of cached dataStatus report in the event of an error Reset responseCaching function when power supply is turned on Enabling and disablingWrite Cache This page is intentionally left blank Glossary Power save mode Rotational delayPIO Programmed input-output PositioningStatus VCMThis page is intentionally left blank Acronyms and Abbreviations This page is intentionally left blank Index AAMIndex Host terminating ultra DMA data Read Sectors Command Read Native MAX AddressSurface temperature measurement This page is intentionally left blank Comment Form JapanThis page is intentionally left blank MHV2120AT, MHV2100AT, MHV2080AT, MHV2060AT, MHV2040AT C141-E218-01ENThis page is intentionally left blank
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