Fujitsu MB39A104 manual Block Diagram

Page 4

MB39A104

BLOCK DIAGRAM

INE1

10

VREF

 

Error

L priority

 

CH1

1

VCCO

 

 

 

PWM

 

 

 

 

 

 

 

 

 

 

 

 

 

10A

Amp1

 

 

 

 

CS1 11

 

+

 

+ Comp.1

 

Drive1

 

 

 

 

+

 

 

 

 

+

 

Pch

3

OUT1

 

 

1.24 V

 

 

 

 

L priority

 

 

 

 

 

 

 

 

 

 

 

 

 

FB1

9

 

 

 

 

IO = 200 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

at VCCO

= 12 V

 

 

 

 

 

 

 

 

Current

4

VS1

 

 

 

 

 

 

 

 

 

 

 

 

 

Protection

+

5

ILIM1

 

 

 

 

 

 

Logic

 

 

 

 

 

 

 

 

 

 

DTC1

6

 

 

 

 

 

 

 

 

INE2

15

VREF

 

Error

L priority

 

CH2

 

 

 

 

 

 

 

 

 

 

 

10A

Amp2

PWM

 

 

 

 

CS2 14

 

+

 

+ Comp.2

 

Drive2

 

 

 

+

 

+

Pch

22 OUT2

 

 

1.24 V

 

 

 

 

L priority

 

 

 

 

 

 

 

 

 

 

 

 

 

FB2 16

 

 

 

 

IO = 200 mA

 

 

 

 

 

 

 

 

 

 

DTC2 19

 

 

 

 

at VCCO

= 12 V

 

 

 

 

 

 

 

 

Current

21

VS2

 

 

H: at SCP

H priority

 

 

 

 

 

Protection

+

20

ILIM2

 

 

 

SCP

 

 

 

 

 

 

 

Logic

 

 

 

 

 

 

Comp.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(3.1 V)

 

H: at OCP

VCC 5 V

2

VH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VH

 

 

 

 

 

 

 

 

 

 

 

SCP

 

 

 

 

Bias

 

 

 

 

Logic

 

 

 

 

Voltage

 

 

CSCP

8

 

 

 

2.5 V

 

 

23 GNDO

 

 

 

 

 

Error Amp Power Supply

 

 

 

 

UVLO

 

 

1.5 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H:UVLO

 

Error Amp Reference

7

VCC

 

 

 

 

 

 

 

 

 

release

 

 

 

 

 

 

bias

1.24 V

 

 

 

 

 

 

 

 

Power

 

 

 

 

OSC

 

 

 

24 CTL

 

 

 

Accuracy

VREF

VR1 ON/OFF

 

 

 

 

 

 

CTL

 

 

 

 

 

 

 

±1%

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.0 V

 

 

 

 

 

 

12

13

 

17

 

18

 

 

 

 

RT CT

 

VREF

 

GND

 

 

4

Image 4
Contents Description FeaturesPackage MB39A104 PIN AssignmentsPin No Symbol Descriptions PIN DescriptionBlock Diagram Parameter Symbol Condition Rating Unit Min Max Parameter Symbol Condition Value Unit Min TypAbsolute Maximum Ratings Recommended Operating ConditionsElectrical Characteristics ParameterPin No Conditions Min Typ MaxParameter Symbol Pin No Conditions Value Unit MinTypical Characteristics Reference Voltage vs. Ambient TemperatureTriangular Wave Oscillation Frequency Power Dissipation vs. Ambient Temperature Functions Timer-latch overcurrent protection circuit block OCP Under voltage lockout protection circuit UvloProtection circuit operating function table Operating circuitSetting the Output Voltage Setting the Triangular Oscillation FrequencySetting the SOFT-START and Discharge Times MB39A104 Treatment Without Using CS Terminal Without Setting Soft-Start TimeAbout TIMER-LATCH Protection Circuit Overcurrent detection circuitOvercurrent Protection Circuit Range of Operation Method to detect by mean currentTimer-latch short-circuit protection circuit Treatment Without Using Cscp Terminal Resetting the Latch of Each Protection CircuitEquivalent Circuit On Power on OFF Standby mode Parts List Component Specification VendorSelection of Components CH1CH2 = 3 2 ⋅ 0.05 ⋅ 0.174 = 0.078 W Example Peak-to-peak value ΔIL Di ≥ I O ⋅ 1 − ESR ≤ ΠfC L 050 491 ESR ≤ ΠfC L 033 364 Reference Data Total Efficiency vs. Input VoltageSwitching Wave Form CH1 Usage Precaution Ordering InformationDo not apply negative voltages Part number Package RemarksPackage Dimensions IndexFujitsu Limited