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Xeon | Xeon | | PowerPC G5 | PowerPC G5 |
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The bidirectional frontside bus allows data to travel to and from the PowerPC G5 processor at the same time. In dual processor systems, each PowerPC G5 has its own dedicated inter- face to maximize throughput—compared with dual Xeon-based systems, which force the processors to share a single bus.
High-Precision Calculations in a Single Clock Cycle
With 64-bit-wide data paths and registers, the PowerPC G5 can execute instructions on 64 bits of data in a single clock cycle—making it possible to perform huge integer calculations and highly precise floating-point mathematics. In contrast, a 32-bit pro- cessor would have to split up any data larger than 32 bits and process it over multiple clock cycles. The advanced calculation capability of the PowerPC G5 is critical in state- of-the-art applications for scientific simulations, 3D modeling, and video effects.
Clock Speeds up to 2GHz
The PowerPC G5 features a scalable design that enables it to run at clock speeds up to 2GHz. This represents a 600MHz jump, the largest in PowerPC history, over the fastest G4 processor at 1.4GHz. What’s more, this breakthrough clock speed boosts performance across the board, accelerating everything from gaming frame rates to digital audio effects.
Industry-Leading 1GHz Frontside Bus
To harness the power of the G5 processor, a 64-bit Double Data Rate (DDR) frontside bus maximizes throughput between the processor and the rest of the system. Unlike conventional processor interfaces, which carry data in only one direction at a time, the PowerPC G5 features two dedicated unidirectional 32-bit data paths (64 bits total): One travels into the processor and one travels from the processor, with no wait time while the processor and the system controller negotiate which will use the bus or while the bus switches direction. In addition, the data streams integrate clock signals along with the data—allowing the frontside bus to work at speeds up to 1GHz for an astounding 8 GBps of total bandwidth.
In dual PowerPC G5 systems, each processor has its own discrete 1GHz frontside bus. The result is a maximum aggregate bandwidth of 16 GBps on dual 2GHz Power Mac G5 systems, well over twice the 6.4-GBps maximum throughput of Pentium 4– or Xeon-based systems. In addition to providing fast access to main memory, this high- performance frontside bus architecture enables each PowerPC G5 to discover and access data in the other processor’s caches—a process called intervention. Cache intervention is made possible by cache coherency, which ensures that the processor always fetches the correct data, even if it has been modified and is in L2 cache.
Full Support for Symmetric Multiprocessing
The PowerPC G5 is designed for symmetric multiprocessing—enabling multiple applications to run independently on different processors or a single multithreaded application to perform multiple tasks simultaneously. For example, while performing an edit, Final Cut Pro can decode two pieces of source video, one on each processor, at the same time.
With dual independent frontside buses and built-in cache coherency, a dual processor system manages priorities between the two processors for maximum efficiency. And since Mac OS X was built from the ground up for symmetric multiprocessing, no special optimization is required for software to take advantage of this powerful capability.
