Sun Microsystems X4440, X4240, X4140 manual Post Code Checkpoints, Primary I/O port

Page 43

 

POST Code Checkpoints

 

The POST code checkpoints are the largest set of checkpoints during the BIOS pre-

 

boot process. TABLE A-2describes the type of checkpoints that might occur during

 

the POST portion of the BIOS. These two-digit checkpoints are the output from

 

primary I/O port 80.

TABLE A-2POST Code Checkpoints

 

 

Post Code

Description

 

 

03

Disable NMI, Parity, video for EGA, and DMA controllers. At this point, only ROM

 

accesses go to the GPNV. If BB size is 64K, turn on ROM Decode below FFFF0000h. It

 

should allow USB to run in the E000 segment. The HT must program the NB specific

 

initialization and OEM specific initialization, and can program if it need be at beginning of

 

BIOS POST, similar to overriding the default values of kernel variables.

04

Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is

 

OK. Verify CMOS checksum manually by reading storage area. If the CMOS checksum is

 

bad, update CMOS with power-on default values and clear passwords. Initialize status

 

register A. Initialize data variables that are based on CMOS setup questions. Initialize both

 

the 8259-compatible PICs in the system.

05

Initialize the interrupt controlling hardware (generally PIC) and interrupt vector table.

06

Do R/W test to CH-2 count reg. Initialize CH-0 as system timer. Install the POSTINT1Ch

 

handler. Enable IRQ-0 in PIC for system timer interrupt. Traps INT1Ch vector to

 

“POSTINT1ChHandlerBlock.”

C0

Early CPU Init Start--Disable Cache--Init Local APIC.

C1

Set up boot strap processor information.

C2

Set up boot strap processor for POST. This includes frequency calculation, loading BSP

 

microcode, and applying user requested value for GART Error Reporting setup question.

C3

Errata workarounds applied to the BSP (#78 & #110).

C5

Enumerate and set up application processors. This includes microcode loading and

 

workarounds for errata (#78, #110, #106, #107, #69, #63).

C6

Re-enable cache for boot strap processor, and apply workarounds in the BSP for errata

 

#106, #107, #69, and #63 if appropriate. In case of mixed CPU steppings, errors are sought

 

and logged, and an appropriate frequency for all CPUs is found and applied. NOTE: APs

 

are left in the CLI HLT state.

C7

The HT sets link frequencies and widths to their final values. This routine gets called after

 

CPU frequency has been calculated to prevent bad programming.

0A

Initializes the 8042 compatible Keyboard Controller.

0B

Detects the presence of PS/2 mouse.

0C

Detects the presence of Keyboard in KBC port.

 

 

Appendix A Event Logs and POST Codes

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Contents Sun Fire X4140, X4240, Servers Diagnostics Guide Please Recycle Contents Error Handling Status Indicator LEDsEvent Logs and Post Codes Index Page Before You Read This Document PrefaceRelated Documentation Web Sites Typographic ConventionsThird-PartySun Welcomes Your Comments Initial Inspection of the Server Service Troubleshooting FlowchartDocument the server settings before you make any changes Gathering Service InformationCollect information about the following items System Inspection Troubleshooting Power ProblemsExternally Inspecting the Server 1X4140 Server Front Panel Internally Inspecting the ServerLocate Button/LED Power Button Page Running SunVTS Diagnostic Tests Using SunVTS Diagnostic SoftwareSunVTS Documentation Diagnosing Server Problems With the Bootable Diagnostics CDUsing the Bootable Diagnostics CD Close the Log file window The window is closed Click the Log buttonDimm Population Rules Troubleshooting Dimm ProblemsHow Dimm Errors Are Handled by the System Dimm Replacement PolicyUncorrectable Dimm Errors Troubleshooting Dimm Problems 1Lines in Ipmi Output Correctable Dimm ErrorsDimm Fault LEDs Bios Dimm Error MessagesPage 1DIMMs and LEDs on Motherboard 2DIMMs and LEDs on Mezzanine Board Isolating and Correcting Dimm ECC ErrorsReconnect AC power cords to the server Page Viewing Event Logs Event Logs and Post CodesESC Advanced Menu Event Logging Details screen is displayed ESC How Bios Post Memory Testing Works Power-On Self-Test PostRedirecting Console Output Appendix a Event Logs and Post Codes Changing Post Options Select BootBoot Settings Configuration screen is displayed Select Boot Settings ConfigurationPage Post Codes Post Codes Primary I/O port Post Code CheckpointsPost Code Checkpoints Initialize Int-13 and prepare for IPL detection Save system context for Acpi External Status Indicator LEDs Status Indicator LEDsBack Panel LEDs Front Panel LEDsHard Drive LEDs Internal Status Indicator LEDsFigure B-4DIMMs and LEDs on Motherboard Figure B-5DIMMs and LEDs on Mezzanine Board Page P E N D I X C Making a Serial Connection to the SP To start the serial console, type the following commandsFrom the System Monitoring tab, select Event Logs Viewing Ilom SP Event LogsFigure C-1System Event Logs Table C-1Event Log Fields Interpreting Event Log Time StampsViewing Replaceable Component Information Figure C-2Replaceable Component Information From the System Information tab, select ComponentsViewing Sensors Figure C-3Sensor Readings Figure C-4Sensor Details Handling of Uncorrectable Errors Error HandlingIpmitool sel list Figure D-1DMI Log Screen, Uncorrectable Error Handling of Correctable Errors Appendix D Error Handling Page Handling of Parity Errors Perr NMI Event Handling of System Errors Serr PCI Serr Handling Mismatching Processors Hardware Error Handling Summary Hardware Error Handling SummarySP SEL PCI Serr SP SEL Page Index BiosPost

X4140, X4440, X4240 specifications

Sun Microsystems was a prominent player in the computing industry, known for its innovative and powerful server systems. Among its notable offerings were the Sun Fire X4240, X4440, and X4140 servers, which made significant inroads in the market for high-performance computing solutions.

The Sun Fire X4240 server was designed to meet the demands of data-intensive applications. It offered impressive scalability, supporting up to 64 GB of DDR2 memory across its eight memory slots. This server utilized AMD Opteron processors, which provided excellent performance thanks to their multi-core architecture. The X4240 also featured a flexible I/O architecture, allowing for various configurations tailored to specific workload requirements.

Next in line was the Sun Fire X4440, which expanded on the capabilities of the X4240. This server was particularly valuable for virtualization and consolidation tasks. It featured up to 128 GB of memory and supported more CPU options, with dual- and quad-core Opteron processors available. The X4440 also included a high-density design that enabled increased storage capacity, accommodating up to 12 SFF drives. This made it ideal for databases and enterprise applications needing fast access to large volumes of data.

Finally, the Sun Fire X4140 brought a balance of performance and efficiency. Like its counterparts, it supported AMD's Opteron processors, delivering robust processing power. The X4140 was designed for environments where space and power efficiency were critical. It was notable for its compact form factor, which allowed organizations to pack more servers into less physical space without sacrificing performance. The server architecture included advanced thermal management technologies, ensuring optimal airflow and cooling, which contributed to reliability in demanding environments.

In terms of connectivity, all three servers featured multiple Gigabit Ethernet ports, offering redundant network connectivity essential for enterprise-level applications. The integrated management interfaces simplified server monitoring and maintenance, ensuring that IT administrators could efficiently manage their resources.

In summary, the Sun Fire X4240, X4440, and X4140 were pivotal servers from Sun Microsystems that provided robust performance, scalability, and efficiency. Their features made them suitable for a variety of workloads, from virtualization to data management, cementing their place in the server market during their era.
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