Compaq MSB900L user manual Cmos RAM Map, Bios Cmos Setup, Device

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DIGITAL-LOGIC AG

MSB900/L Detailed Technical Manual V1.0

5.6.4.1.Standard BIOS ROM

Device:

FWH

 

 

 

 

Map:

E0000 - FFFFFh

Core BIOS 128k

 

C0000 - C7FFFh

VGA BIOS 32k

 

CC000 - CFFFFh

FREE

5.6.5.BIOS CMOS Setup

If wrong setups are memorized in the CMOS-RAM, the default values will be loaded after resetting the RTC/CMOS-RAM by de-soldering the battery.

If the battery is down, it is always possible to start the system with the default values from the BIOS.

5.7.CMOS RAM Map

Systems based on the industry-standard specification include a battery backed Real Time Clock chip. This clock contains at least 64Bytes of non-volatile RAM. The system BIOS uses this area to store information including system configuration and initialization parameters, system diagnostics, and the time and date. This information remains intact even when the system is powered down.

The BIOS supports 128Bytes of CMOS RAM. This information is accessible through I/O ports 70h and 71h. CMOS RAM can be divided into several segments:

￿Locations 00h - 0Fh contain the real time clock (RTC) and status information

￿Locations 10h - 2Fh contain system configuration data

￿Locations 30h - 3Fh contain system BIOS-specific configuration data as well as chipset-specific in- formation

￿Locations 40h - 7Fh contain chipset-specific information as well as power management configuration parameters

The following table provides a summary of how these areas may be further divided.

Beginning

Ending

Checksum

Description

 

 

 

 

00h

0Fh

No

RTC and Checksum

10h

2Dh

Yes

System Configuration

2Eh

2Fh

No

Checksum Value of 10h - 2Dh

30h

33h

No

Standard CMOS

34h

3Fh

No

Standard CMOS - SystemSoft Reserved

40h

5Bh

Yes

Extended CMOS - Chipset Specific

5Ch

5Dh

No

Checksum Value of 40h - 5Bh

5Eh

6Eh

No

Extended CMOS - Chipset Specific

6Fh

7Dh

Yes

Extended CMOS - Power Management

7Eh

7Fh

No

Checksum Value of 6Fh - 7Dh

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Contents SBC MSB900/LMSB900/L Detailed Technical Manual About this Manual and How to Use ItTable of Contents 10.1 Trademarks PrefaceDisclaimer Environmental Protection StatementTechnical Support Limited Two Year WarrantyRecycling Information CE Conformity Explanation of SymbolsApplicable Documents and Standards RoHS Commitment For Your SafetyWeee Application RoHS Compatible Product DesignRoHS Compliant Production Process Swiss Association for Quality and Management Sys- tems Swiss QualityUnique Features Standard Features of the MSB900/LOverview DMAMSB900 Block Diagram MSB900/MSB900L specifications Standard AT Interfaces Specification Name Mass Storage SpecificationPeripheral Extension Specification Power Supply SpecificationRelated Application Notes Examples of Ordering CodesMSB900/L Dimensions & DiagramsDIGITAL-LOGIC AG DIGITAL-LOGIC AG DIGITAL-LOGIC AG Mm millimeter + / 0.1mm 25.10.2006 / BRR MSB800CON Part NrBoard / Version Unit Tolerance Date / Author High Frequency Radiation to meet EN55022 MSB900/L Incompatibilities to a standard PC/ATBUS Signals Battery-LifetimeExternal battery assembling for the MSB900L Addressing PCI DevicesVersion Date Status Modifications This Bios history is not for the following productsBoot Time Power RequirementsTest environment for power consumption measurement Detailed System DescriptionInterfaces CPU, Boards and RAMsSerial Ports COM1-COM2 ControllersFloppy Disk Interface Interrupt ControllersProgrammable Timers Timers and CountersROM-BIOS Sockets RTC Real Time ClockCmos RAM Map Bios Cmos SetupDevice MapCmos Map Cmos Map Bit = Internal IDE Controller Disable Password Bits = Reserved 34h Minor CPU Revision Eeprom saved Cmos SetupSystem Memory Map Eeprom Memory for SetupMemory & I/O Map Addr Function Size Comment System I/O mapIf KEL Memory Offset 100h0 = LPC MSB900/L Detailed Technical Manual MapMSR bit enables/disables into I/O Graphic Modes Resolution Col. Dept FrequencyVGA/LCD Controller of the Geode LX900 Connector Structure Pin Remarks Description of the ConnectorsVideo Input Flat cableTop view of the MSB900/L Bottom view of the MSB900/L X14 Power Supply Pin Signal Shield Power supplyPin Signal X15 Operator Panel / Flat Panel bottom side GND LVDSYAP1 LVDSYAM1 GND LVDSYAP0 LVDSYAM0GND LVDSYAP2 LVDSYAM2 GND Lvdsclkam LvdsclkapConnector and Adapter Mini- DIN PS/2 6 PC Remarks X31 Keyboard PS/2 and Mouse Utility ConnectorX33 10/100 BASE-T Interface Connector Pin Signal CAT X34 10/100 BASE-T Interface Connector Pin SignalX51 USB 2 Connector Dual USB Pin Signal Remarks X39 Serial Port COM2 Header onboard SUB connector SignalX50 USB 1 Connector Dual-USB Pin Signal Remarks X52 USB Udoc not assembled X60 IDE Interface Pin SignalPin Power supply GND Dlag boards have them as NC not connected X110 LPC-Port X101 PCI-104 BUS Interface PinTCK TMS TDI TDO X230 JTAG-Port Pin SignalX301 VGA Monitor CRT-Signals 15pins High-Density DSub Pin Disabled Reload Default Bios SettingsJumper Locations on the Board Jumpers on MSB900/LDIGITAL-LOGIC AG Hard Disk Cable 44pin Cable InterfacesCOM1/LPT Serial Interface Cable Pin Signal COM1 9pin D-Sub malePin Signal LPT1 25pin D-Sub female COM2 Serial Interface Cable Pin Signal COM2 9pin D-Sub maleMHz Uin Thermal SpecificationsThermal Analysis for Case Integration MSB900/L Assembly ViewsDIGITAL-LOGIC AG Mechanical Dimensions Separate standard Dhcp and redirection services PXE-BOOT and PXE-SETUP in the BiosCombined standard Dhcp and redirection services DIGITAL-LOGIC AG Product Currency Circle one PXE-LICENSE OrderMPC20 USD CHFCmos Bios CmosDram EMI / EMCUdoc USB VGA ROM-BIOS RTCSQS

MSB900, MSB900L specifications

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