Microsoft UNO-3074 user manual Counter Output Destination, Counter Interrupt Flag

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Table 2.14: Counter Gate Source Control Bit

CTR0GateSet

0

Gate source from “CTR0Gate” control bit (Default)

 

 

 

 

1

Gate source from digital input 0 (DI0) channel

 

 

 

CTR1GateSet

0

Gate source from “CTR1Gate” control bit (Default)

1Gate source from digital input 2 (DI2) channel

2.7.8Counter Output Destination

You can choose the output destination of counter 0 and counter 1 by setting “Output Destination control bits”- CTR0OutSet and CTR1OutSet.

Table 2.15: Counter Output Destination Control Bit

CTR0OutSet 0 Output destination to “CTR0Out” status bit (Default)

1Output destination to “CTR0Out” status bit and digital output 2 (DO2) channel

CTR1OutSet 0 Output destination to “CTR1Out” status bit. (Default)

1Output destination to “CTR1Out” status bit and digital output 3 (DO3) channel

2.7.9Counter Interrupt Flag

The interrupt flag bit is a flag indicating the status of an interrupt. It is a readable/writable bit. To find the status of the interrupt, you have to read the bit value; to clear the interrupt, you have to write “1” to this bit. This bit must first be cleared to service the next coming interrupt. Besides, you can choose if counter 0 or counter 1 generate interrupt signal by configuring “CTR0IntSet” and “CTR1IntSet” control bit.

Table 2.16: Counter Interrupt Flag Control Bit

CTR0F, CTR1F

 

Counter Interrupt Status

 

 

 

Read

0

No interrupt

 

 

 

 

1

Interrupt occur

 

 

 

Write

0

Don’t care

 

 

 

 

1

Clear interrupt

 

 

 

CTR0IntSet, CTR1IntSet

Counter Interrupt Control

 

 

 

0

 

Disable (Default)

 

 

 

1

 

Enable

 

 

 

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Chapter2

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Contents UNO-3074 Acknowledgements CopyrightSupport Product Warranty 2 years FCC Class a Technical Support and Assistance Declaration of ConformitySafety Instructions Safety Precaution Static Electricity Contents Chapter Initial Setup Appendix Programming the Watchdog Timer Page Overview Open Architecture Designed for Automation IntroductionAn Industry-Proven Design Front Access ConnectionsOff-the-shelf Universal PCI Extensions Designed to Fit Into Control CabinetsFlexible Networking Options Onboard DI/O for Counter, Alarm/Event HandlingPopular Operating Systems and Rapid Application Development Battery Backup RAM 512 KB Chipset Hardware SpecificationsCPU RS-232 SpeedCh Isolated Digital Input DI0~DI3 Two 16-bit Counters/TimersCh Isolated Digital Output DO0~DO3 Anti-ShockPower Supply 16 ~ 36 VDC Safety PrecautionsPower Consumption 24 W Typical Chassis Size WxHxDChassis Dimensions for CeleronM 1GHz Chassis DimensionsChassis for Pentium 1.8GHz or Faster CPU Packing List AccessoriesHardware Functionality Front Panel of UNO-3074 RS-232/422/485 Interface COM3~COM4 RS-232 Interface COM1~COM21 16C550 UARTs with 16-byte Fifo Standard 2 RS-422/485 Detection5 RS-485 Auto Flow/RS-422 Master/Slave Selection 4 RS-232/422/485 SelectionAuto Flow & RS-422 Slave/Masters 6 IRQ, I/O Address and Transmission Rate SettingVector address for share IRQ 1D0H Transmission Rate Switch 2 at SW3 IRQ Setting via Switch 1 at SW3Onboard Isolated Digital Input LAN Ethernet ConnectorTermination Resistor JP6 Pin AssignmentsIsolated Inputs Digital Input Connector Signal DescriptionIRQ Level Interrupt Function of the DI SignalsInterrupt Control Register Interrupt Control Register Bit MapInterrupt Triggering Edge Control Interrupt Enable Control FunctionInterrupt Flag Bit Onboard Isolated Digital Output Digital Output Connector Signals10 Digital Output Power On Configuration Power On ConfigurationIsolated Outputs Isolated Digital Output Connection Counter/Timer Control Register Onboard Isolated Counter/Timer11 Counter/Timer Control Register Bit Map Counter 1 Function Block Counter 0 Function BlockCounter Clock Source 4 32-bit Counter Function Block CTR32Set=1Counter Internal Clock Counter Gate SourceCounter Interrupt Flag Counter Output Destination14 Counter Gate Source Control Bit 15 Counter Output Destination Control BitCascaded 32-bit Counter Power Input17 32-bit Counter Control Bit 12 LED Locations to Monitor Power Input LED and Buzzer for System Diagnosis 18 Power Register Bit Map20 Programmable LED Control Bit 19 LED & Buzzer Control RegisterPS/2 Keyboard and Mouse Connector USB ConnectorPcmcia PC Card Slot 21 Programmable Buzzer Control BitPage Make sure the IRQ of Pcmcia device is VGA Display Connector Page 14 LED Location for Battery Backup Battery Backup SramLithium Battery Specification Reset ButtonOutput voltage 3 VDC Initial Setup Inserting a CompactFlash Card Connecting PowerJP2 on mainboard refer to Figures A.3 JP1 on daughterboard refer to Figure A.4Correct way is shown by the first figure below Installing a Hard DiskPage Page Page IDE Connector CN1 and CN2 1st Anti-Vibration Rubber Installing a PCI-bus Card2nd PCI-bus Card Installation Mounting UNO-3074 Installing Power CableUNO-3074 Mounting Caution UNO-3074 Improper InstallationUNO-3074 Correct Installation Bios Setup and System Assignments Page System Settings and Pin Assignments Table A.1 UNO-3074 System I/O Port System I/O Address and Interrupt AssignmentsInterrupt No Interrupt Source Table A.2 UNO-3074 Interrupt AssignmentsFigure A.1 Backplane Connector & Jumpers Board Connectors and JumpersFigure A.3 Mainboard Connector & Jumpers Front Figure A.4 Daughter Connector & Jumpers Front Figure A.5 Daughter Connector & Jumpers Back Table A.4 Connector and Jumper Descriptions Table A.3 Connector and Jumper DescriptionsSW1 Table A.5 Connector & Jumper DescriptionsTable A.6 UNO-3074 Control Register UNO-3074 Control RegisterTable A.7 RS-232 Serial Port Pin Assigns RS-232 Standard Serial Port COM1~COM2Table A.9 Ethernet RJ-45 Connector Pin Assigns Ethernet RJ-45 Connector LAN1~LAN2RS-232/422/485 Serial Port COM3~COM4 Table A.8 RS-232/422/485 Serial Port Pin AssignsTable A.10 Power Connector Pin Assignments Power Screw Terminal PWRUSB Connector USB1~USB4 PS/2 Keyboard and Mouse ConnectorTable A.11 Keyboard & Mouse Connector Pins Table A.12 USB Connector Pin AssignmentsTable A.13 VGA Adaptor Cable Pin Assignmen Page Programming the Watchdog Timer Appendix B Programming the Watchdog Timer