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noise, and eliminate the need for snubber networks.
Use Optoisolation To Avoid Ground Loops
The gate-drive techniques described in the following sections illustrate the economy and flexibility the IGT brings to power control: economy, because you can drive the device’s gate directly from a preceding collector, via a resistor network, for example; flexibility, because you can choose the drive circuit’s impedance to yield a desired turn-off time, or you can use a switchable impedance that causes the IGT to act as a charge- controlled device requiring less than 10 nanocoulombs of drive charge for full turn-on.
Take Some Driving Lessons
Note the IGT’s straightforward drive compatibility with CMOS, NMOS and open-collector TTL/HTL logic circuits in the common-emitter configuration Figure 1A. R3 controls the turn- off time, and the sum of R3 and the parallel combination of R1 and R2 sets the turn-on time. Drive-circuit requirements, however, are more complex in the common-collector configuration Figure 1B.
In this floating-gate-supply floating-control drive scheme, R1 controls the gate supply’s power loss, R2 governs the turn-off time, and the sum of R1 and R2 sets the turn-on time. Figure 1C shows another common-collector configuration employing a bootstrapped gate supply. In this configuration, R3 defines the turn-off time, while the sum of R2 and R3 controls the turn- on time. Note that the gate’s very low leakage allows the use of low-consumption bootstrap supplies using very low-value capacitors. Figure 1 shows two of an IGT’s strong points. In the common-emitter Figure 1A, TTL or MOS-logic circuits can drive the device directly. In the common-collector mode, you’ll need level shifting, using either a second power supply Figure 1B or a bootstrapping scheme Figure 1C.
FIGURE 1A. SIMPLE DRIVING AND TRANSITION-TIME
CONTROL
| | | | | | VCC | | | | | | | | | |
| | | | | | | | | | | | | | | | |
| | | | | | CONTROL | | | | | | | | | |
| | | | | | INPUT | | | | R1 | | | | |
| ON | | | | | R2 |
| | | | | | | | | | |
| | | | OFF | | | | | | | | | 15V | | | | |
| | | | | | | | | | | | | | | | | | | | |
| R1 | CONTROLS GATE | LOAD |
| SUPPLY POWER LOSS |
| |
| R2 CONTROLS tOFF | |
| R1 | + R2 CONTROLS tON | |
FIGURE 1B. A SECOND POWER SUPPLY
| | | | | | | | 15 ≤ | VCCR2 | ≤ 25V |
| | | | | | | | R-------------------1+ R2 |
| | | | | | | | | |
| | | | | | | | R3 CONTROLS tOFF |
| | | | | | | | R2 + R3 CONTROLS tON |
| | | | | | | |
| | | R1 | | | | τ « ------------------------------------------------ | 5C | |
| | | | R2 | | R3 | ICEO + IGES + 2IR |
| | | | |
| | | | | | | | | | |
| | | | | | | | | | |
OFF
ON
LOAD
FIGURE 1C. BOOTSTRAPPING SCHEME
In the common-collector circuits, power-switch current flowing through the logic circuit’s ground can create problems. Optoisolation can solve this problem (Figure 2A.) Because of the high common-mode dV/dt possible in this configuration, you should use an optoisolator with very low isolation capaci- tance; the H11AV specs 0.5pF maximum.