Fairchild AN-7511 manual Piezoelectric Couplers Provide 4-kV Isolation

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Application Note 7511

Piezoelectric Couplers Provide 4-kV Isolation

Using a high-frequency oscillator for pulse-train drive Figure 6B yields unlimited on-time capability. However, the scheme requires an oscillator that can be turned on and off by the control logic. A diode or zener clamp across the trans- former’s primary will limit leakage-inductance flyback effects.

age-doubler circuitry improves the turn-on time and also pro- vides long on-time capability. Although this design uses only a 5V supply on the primary side of a standard trigger trans- former, it provides 15V gate-to-emitter voltage.

To optimize transformer efficiency, make the pulses’ voltage x time products equal for both the On and the Off pulses. In situations where the line voltage generates the drive power, a simple relaxation oscillator using a programmable unijunc- tion transistor can derive its power directly from the line to provide a pulse train to the IGT gate.

The circuit shown in Figure 7 accommodates applications involving lower frequencies (a few hundred Hertz and

OSCILLATOR

1N914

 

 

1:2

0.001

IGT

 

F

 

 

4.7k

1N914

 

 

 

0.001F

 

below). The high oscillator frequency (greater than 20kHz) helps keep the pulse transformer reasonably small. The volt-

FIGURE 7. THIS DRIVING METHOD FOR LOW-FREQUENCY SWITCHING PROVIDES 15V TO THE IGT’S GATE

D7

 

 

 

 

 

 

 

 

L1

 

 

 

 

 

 

 

 

 

 

D1

 

D3

D5

 

 

 

C1

Q1

 

Q3

 

Q5

 

 

 

R

R

R

 

 

 

325V

 

 

 

 

 

 

 

INDUCTION

10A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MOTOR

 

 

 

 

 

 

 

 

 

 

D2

 

D4

D6

NOTES:

 

 

 

 

Q

- Q = D94FR4

 

 

 

 

 

 

 

1

6

220V

R

 

 

 

 

 

D1 - D7 = 1N3913

Q2

R

Q4

R

Q6

D8 - D13 = 1N914

 

 

 

 

 

 

 

R = 4.7k, 1/ W

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

C1 = 100F, 400V

 

 

 

 

 

 

 

L1 = 40H

 

FIGURE 9A. THE POWER INVERTER’S DRIVE CIRCUIT USES SIX IGTS TO DRIVE A 2-HP MOTOR.

φA

180o

 

 

 

VAB

 

 

 

 

 

 

 

 

 

 

Q

1

ON

15o DELAY

 

 

0

t

 

0

 

 

 

t

 

 

 

 

 

Q2ON

 

VBC

 

 

 

 

 

 

 

 

φB

 

 

 

Q3ON

 

 

0

t

 

 

 

 

 

 

 

 

0

 

 

 

t

 

 

 

 

 

 

Q4ON

 

 

 

 

 

 

 

 

VCA

t

 

 

 

 

 

 

 

φC

 

 

 

 

 

 

0

 

0

 

Q5ON

ILA

 

Q6ON

t

 

 

 

0

t

 

 

 

ILA

0

t

ILB

 

 

 

 

0

 

t

ILB

 

0

t

ILC

 

 

 

 

 

 

 

 

ILC

 

 

 

 

 

 

0

t

0

t

 

FIGURE 9B. THE TIMING DIAGRAM SHOWS THAT EACH IGT CONDUCTS FOR 165OF EVERY 360o CYCLE; THE DELAY IS NECESSARY TO AVOID CROSS CONDUCTION.

FIGURE 9C. THE THREE WINDINGS’ VOLTAGES AND CUR- RENTS ARE SHOWN. NOTE THAT ALTHOUGH COSTLY SNUBBER NETWORKS ARE ELIMINAT- ED, FREEWHEELING DIODES ARE NEEDED; THE IGTS HAVE NO INTRINSIC OUTPUT DIODE.

©2002 Fairchild Semiconductor Corporation

Application Note 7511 Rev. A1

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