Texas Instruments SCAU020 manual CDCE421EVM Board-Block D Schematic

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Schematics and Layout

Figure 14. CDCE421EVM Board—Block D Schematic

SCAU020 –March 2007

10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board

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Contents Users Guide Submit Documentation Feedback Contents List of Figures General Description CDCE421EVM Evaluation Board FeaturesCDCE421EVM Programming Blocks Signal Path and Control CircuitryBlock D Block aBlock B Block CSoftware Installation Screen Installing the Software GUI and USB DriverStore Crystal Frequency Using Software-Enabled Automatic PLL SelectionIC Block Configuration and Input Calculator ChronosGUIPLL Bandwidth Select Output Calculator and Apply PLL SettingsWrite to CDCE421 Eeprom Chronos GUI-Manual PLL Block Selection Pop-Up Manual PLL Block Selection Advanced ControlSection Function Software Settings DescriptionProgramming Configuration USB Cable Attached Configuring the BoardCDCE421EVM Block Switch Off Schematics and LayoutCDCE421EVM Board Schematic CDCE421EVM Board-Block a Schematic CDCE421EVM Board-Block B Schematic CDCE421EVM Board-Block C Schematic CDCE421EVM Board-Block D Schematic FCC Warning Evaluation BOARD/KIT Important NoticeImportant Notice