3-11-1 CPU Feature
Phoenix – AwardBIOS CMOS Setup Utility
CPU Feature
Virtualization | Enabled | Item Help |
AMD K8 Cool & Quiet control | Disabled | |
TLB Check | Enabled |
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Advanced clock calibration | Disabled | Menu Level > |
Value (ALL Cores) | 2% |
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Value (Cores 0) | 2% |
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Value (Cores 1) | 2% |
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Value (Cores 2) | 2% |
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Value (Cores 3) | 2% |
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↑↓→← Move Enter:Select
F5:Previous Values |
3-11-2 DRAM Configuration
Phoenix – AwardBIOS CMOS Setup Utility
DRAM Configuration
DRAM Latency(tcl) | Auto | Item Help | |
(Trcd)RAS to CAS R/W Delay | 6 Clocks | ||
(Trp) Row precharge Time | 6 Clocks |
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(Tras)Minimum RAS Active Time | 18 bus clocks |
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DRAM Command Rate | 2T |
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CKE base Power dowe mode | Enabled |
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CKE BASED Powerdown | per channel |
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Memclock | Disabled |
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Memory Hole Remapping | Enabled |
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Auto optimize Bottom IO | Enabled |
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*Bottom of 【31:24】IO space | DO |
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Bottom of UMA DDRAM [31:24] | FC |
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DDRII Timing Item | Disabled |
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Refresh Mode Select | Auto |
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Idle cycle limit | Auto |
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TwTr Command Delay | 3 bus clocks |
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Trfc 0 for DIMM0 | 75ns |
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* Trfc 1 for DIMM 1 | 75ns |
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* Trfc 2 for DIMM 2 | 75ns |
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* Trfc 3 for DIMM 3 | 75ns |
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* (Twr) write Recovery Time | 6 bus clock |
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Menu Level >> | |||
* (Trtp) Precharge Time | 3 clocks | ||
(Trc) Row cycle Time | 26 bus clocks |
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Trc RAS to RAS Delay | 5 clocks |
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Trcd RAS to CAS R/W Delay | 6 clocks |
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↑↓→← Move Enter:Select
F5:Previous Values | F6:Optimized Defaults F7:Standard Defaults |
CAS # Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing. The settings are: Auto,3, 4 and 5.
RAS-to-CAS Delay
36