Seagate ST3250824ACE, ST3120213ACE, ST3160212ACE manual ATA interface signals and connector pins

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4.0ATA interface

These drives use the industry-standard ATA task file interface that supports 16-bit data transfers. It supports ATA programmed input/output (PIO) modes 0–4; multiword DMA modes 0–2, and Ultra DMA modes 0–5. The drive also supports the use of the IORDY signal to provide reliable high-speed data transfers.

You can use a daisy-chain cable to connect two drives to a single AT host bus. For detailed information about the ATA interface, refer to the draft of AT Attachment with Packet Interface Extension (ATA/ATAPI-7), NCITS T13 1410D, subsequently referred to as the Draft ATA-7 Standard.

4.1ATA interface signals and connector pins

Figure 7 summarizes the signals on the ATA interface connector that the drive supports. For a detailed descrip- tion of these signals, refer to the Draft ATA-7 Standard.

Drive pin #

 

 

Signal name

 

 

Host pin # and signal description

1

 

 

 

 

 

 

 

 

 

 

Reset–

 

 

 

 

 

 

1

Hardware Reset

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

Ground

2

Ground

3

 

 

 

 

 

 

 

 

 

 

DD7

 

 

3

Host Data Bus Bit 7

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

DD8

 

 

4

Host Data Bus Bit 8

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

 

 

DD6

 

 

5

Host Data Bus Bit 6

 

 

 

 

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

DD9

 

 

6

Host Data Bus Bit 9

 

 

 

 

 

 

 

 

7

 

 

 

 

 

 

 

 

 

 

DD5

 

 

7

Host Data Bus Bit 5

 

 

 

 

 

 

 

 

8

 

 

 

 

 

 

 

 

 

 

DD10

 

 

8

Host Data Bus Bit 10

 

 

 

 

 

 

 

 

9

 

 

 

 

 

 

 

 

 

 

DD4

 

 

9

Host Data Bus Bit 4

 

 

 

 

 

 

 

 

10

 

 

 

 

 

 

 

 

 

 

DD11

 

 

10

Host Data Bus Bit 11

 

 

 

 

 

 

 

 

11

 

 

 

 

 

 

 

 

 

 

DD3

 

 

11

Host Data Bus Bit 3

 

 

 

 

 

 

 

 

12

 

 

 

 

 

 

 

 

 

 

DD12

 

 

12

Host Data Bus Bit 12

 

 

 

 

 

 

 

 

13

 

 

 

 

 

 

 

 

 

 

DD2

 

 

13

Host Data Bus Bit 2

 

 

 

 

 

 

 

 

14

 

 

 

 

 

 

 

 

 

 

DD13

 

 

14

Host Data Bus Bit 13

 

 

 

 

 

 

 

 

15

 

 

 

 

 

 

 

 

 

 

DD1

 

 

15

Host Data Bus Bit 1

 

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

 

 

 

DD14

 

 

16

Host Data Bus Bit 14

 

 

 

 

 

 

 

 

17

 

 

 

 

 

 

 

 

 

 

DD0

 

 

17

Host Data Bus Bit 0

 

 

 

 

 

 

 

 

18

 

 

 

 

 

 

 

 

 

 

DD15

 

 

18

Device Data (15:0)

 

 

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

 

Ground

19

Ground

20

 

 

 

 

 

 

 

 

 

 

(removed)

20

(No Pin)

21

 

 

 

 

 

 

 

 

 

 

DMARQ

 

 

 

 

 

21

DMA Request

 

 

 

 

 

 

 

 

 

 

 

22

 

 

 

 

 

 

 

 

 

 

Ground

22

Ground

23

 

 

 

 

 

 

 

 

 

 

DIOW–

 

 

 

 

 

 

 

23

Device I/O Write:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STOP

 

 

 

 

 

 

 

 

 

 

Stop Ultra DMA Burst

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

 

 

 

 

 

Ground

24

Ground

25

 

 

 

 

 

 

 

 

 

 

DIOR–

 

 

 

 

 

 

25

Device I/O Read:

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HDMARDY–

 

 

 

 

 

 

 

Host Ultra DMA Ready:

 

 

 

 

 

 

 

 

 

 

 

HSTROBE

 

 

 

 

 

 

 

 

 

Host Ultra DMA Data Strobe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26

 

 

 

 

 

 

 

 

 

 

Ground

26

Ground

27

 

 

 

 

 

 

 

 

 

 

IORDY

 

 

 

 

 

27

I/O Channel Ready

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DDMARDY–

 

 

 

 

 

 

 

Device Ultra DMA Ready

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DSTROBE

 

 

 

 

 

 

 

 

Device Ulta DMA Data Strobe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

28

 

 

 

 

 

 

 

 

 

 

CSEL

 

 

 

 

 

 

28

Cable Select

 

 

 

 

 

 

 

 

 

 

 

29

 

 

 

 

 

 

 

 

 

 

DMACK–

 

 

 

 

 

 

 

29

DMA Acknowledge

 

 

 

 

 

 

 

 

 

 

 

 

30

 

 

 

 

 

 

 

 

 

 

Ground

30

Ground

31INTRQ 31 Device Interrupt

32IOCS16– 32 Reserved

33

 

 

 

 

 

 

DA1

 

 

33

Host Address Bus Bit 1

 

 

 

 

 

 

34

 

 

 

 

 

 

PDIAG–

 

 

34

Passed Diagnostics

35

 

 

 

 

 

 

CBLID–

 

 

35

Cable Assembly Type Identifier

 

 

 

 

 

 

DA0

 

 

Device Address (2:0)

 

 

 

 

 

 

 

 

36

 

 

 

 

 

 

DA2

 

 

36

Device Address (2:0)

37

 

 

 

 

 

 

CS0–

 

 

 

37

Chip Select (1:0)

38

 

 

 

 

 

 

CS1–

 

 

 

38

Chip Select (1:0)

39

 

 

 

 

 

 

DASP–

 

39

Drive Active/Slave Present

40

 

 

 

 

 

 

Ground

40

Ground

Pins 28, 34 and 39 are used for master-slave communication (details shown below).

Drive 1 (slave)

28

34

39

Drive 0 (master)

28

34

39

CSEL

PDIAG–

DASP–

Host

28

34

39

Figure 7 I/O pins and supported ATA signals

DB35 Series 7200.2 Product Manual, Rev. D

29

Image 35
Contents DB35 Series Page Contents DB35 Series 7200.2 Product Manual, Rev. D List of Figures DB35 Series 7200.2 Product Manual, Rev. D Introduction DB35 Series 7200.2 Product Manual, Rev. D Specification summary table Drive specificationsDrive specification ST3500841ACE ST3400833ACE Drive specifications for 500 and 400 Gbyte modelsFollowing web Drive specification ST3300822ACE ST3250824ACE ST3200827ACE Drive specifications for 300, 250, and 200 Gbyte modelsDB35 Series 7200.2 Product Manual, Rev. D Drive specification ST3160212ACE ST3120213ACE ST3802110ACE Drive specifications for 160, 120, and 80 Gbyte modelsAccess the following web Recording and interface technology Default logical geometryLBA mode Formatted capacityDB35 Series 7200.2 Product Manual, Rev. D Start/stop times Physical characteristicsSeek time Power specifications Voltage tolerance Typical current profileConducted noise Sleep mode Power-management modesActive mode Idle modeEnvironmental specifications Operating vibration AcousticsNonoperating shock VibrationRadio frequency environments Electromagnetic immunityReliability Korean RRL Safety certificationAgency certification Electromagnetic compatibilityEuropean Union Restriction of Hazardous Substances RoHS Environmental protectionFCC verification Corrosive environment DB35 Series 7200.2 Product Manual, Rev. D Handling and static discharge precautions Configuring and mounting the driveBreather filter hole location Breather filter hole precautionsCable-select option Jumper settingsMaster/slave configuration Drive as master with a non-ATA-compatible slaveUltra ATA/100 cable Drive mountingMounting dimensions-top, side and end view DB35 Series 7200.2 Product Manual, Rev. D ATA interface ATA interface signals and connector pinsCommand name Command code in hex Supported ATA commandsF6H Write Sectors Without Retries 31H Write Sectors Extended 34H Word Description Value Identify Device commandXx07H Description if bit is set to Bit Word 0CH Set Features commandCode in features Register A.R.T. command 4 S.M.A.R.T. commandsDB35 Series 7200.2 Product Manual, Rev. D Technical Support Seagate Technology support servicesInternet Presales SupportData Recovery Services Call Center Toll-free Direct dial Warranty ServiceData Recovery Services Authorized Service Centers Numerics IndexPage TMR DB35 Series 7200.2 Product Manual, Rev. D Page Seagate Technology LLC
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