Cypress CY7C1353G manual ZZ Mode Timing23,24, NOP, Stall and Deselect Cycles19, 20

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CY7C1353G

Switching Waveforms

NOP, STALL and DESELECT Cycles[19, 20, 22]

1

2

3

4

5

6

7

8

9

10

CLK

CEN

CE

ADV/LD

WE

BW[A:B]

ADDRESS A1 A2 A3 A4 A5

 

 

 

 

 

tCHZ

DQ

D(A1)

Q(A2)

Q(A3)

D(A4)

Q(A5)

 

 

 

 

 

tDOH

COMMAND

WRITE

READ

 

 

D(A1)

Q(A2)

ZZ Mode Timing[23,24]

STALL

READ

WRITE

STALL

NOP

 

Q(A3)

D(A4)

 

 

DON’T CARE

UNDEFINED

READ Q(A5)

DESELECT

CONTINUE DESELECT

CLK

ZZ

ISUPPLY

ALL INPUTS (except ZZ)

Outputs (Q)

tZZ

tZZI

I DDZZ

High-Z

DON’T CARE

tZZREC

tRZZI

DESELECT or READ Only

Notes:

22.The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrates CEN being used to create a pause. A write is not performed during this cycle. 23.Device must be deselected when entering ZZ mode. See truth table for all possible signal conditions to deselect the device.

24.DQs are in high-Z when exiting ZZ sleep mode

Document #: 38-05515 Rev. *E

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1133 MHz 100 MHz Unit Pin ConfigurationSelection Guide CY7C1353GPin Definitions Functional Overview ZZ Mode Electrical Characteristics Linear Burst Address Table Mode = GNDInterleaved Burst Address Table Mode = Floating or VDD Function Partial Truth Table for Read/Write 2, 3Ambient Range Electrical Characteristics Over the Operating Range 10,11Maximum Ratings Operating RangeAC.Test Loads and Waveforms Capacitance12Thermal Resistance12 Switching Characteristics Over the Operating Range 17 Write Switching WaveformsRead/Write Waveforms 19, 20 NOP, Stall and Deselect Cycles19, 20 ZZ Mode Timing23,24Pin Tqfp 14 x 20 x 1.4 mm Package DiagramsOrdering Information Document History Issue Date Orig. Description of Change