Cypress
CY2291
manual
Package Diagram, Pin 300 MIL Soic Package Outline
Package Characteristics
Logic Block Diagram
Output Configuration
Switching Waveforms
Page 11
CY2291
Package Diagram
Figure 6.
20-Pin
(300 MIL) SOIC Package Outline
51-85024
*C
Document #:
38-07189
Rev. *C
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Contents
Cypress Semiconductor Corporation 198 Champion Court
Features
Logic Block Diagram
Benefits
Pin Definitions Name Pin Number Description
Pinouts
Operation
Output Configuration
Power Saving Features
Custom Configuration Request Procedure
Parameter Description Part Numbers Min Max Unit
Electrical Characteristics, Commercial
Maximum Ratings
Operating Conditions5
Electrical Characteristics, Industrial
Cpll
Switching Characteristics, Commercial
Parameter Name Description Min Typ Max Unit
50%
CY2291F MHz
Operation 80 MHz 76.923 kHz CY2291F
66.6 MHz 76.923 kHz Output Duty
80 MHz 76.923 kHz Output Duty
Switching Characteristics, Industrial
Output Period Clock output range CY2291I
5V operation 90 MHz 76.923 kHz CY2291FI
Clock Jitter14 Peak-to-peak period jitter fOUT 50 MHz
Switching Waveforms
MHz/ms
Clock Jitter14 Peak-to-peak period jitter
Ordering Information
Package Characteristics
Test Circuit
Pin 300 MIL Soic Package Outline
Package Diagram
Orig. Submission Description of Change Date
Sales, Solutions, and Legal Information
Document History
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