Cypress CY2291 manual Operation, Output Configuration, Power Saving Features

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CY2291

Operation

The CY2291 is a third-generation family of clock generators. The CY2291 is upwardly compatible with the industry standard ICD2023 and ICD2028 and continues their tradition by providing a high level of customizable features to meet the diverse clock generation needs of modern motherboards and other synchronous systems.

All parts provide a highly configurable set of clocks for PC motherboard applications. Each of the four configurable clock outputs (CLKA–CLKD) can be assigned 1 of 30 frequencies in any combination. Multiple outputs configured for the same or related[3] frequencies have low (<500 ps) skew, in effect providing on-chip buffering for heavily loaded signals.

The CY2291 can be configured for either 5V or 3.3V operation. The internal ROM tables use EPROM technology, allowing full customization of output frequencies. The reference oscillator has been designed for 10 MHz to 25 MHz crystals, providing additional flexibility. No external components are required with this crystal. Alternatively, an external reference clock of frequency between 1 MHz and 30 MHz can be used. Customers using the 32-kHz oscillator must connect a 10-MW resistor in parallel with the 32-kHz crystal.

Output Configuration

The CY2291 has five independent frequency sources on-chip. These are the 32-kHz oscillator, the reference oscillator, and three Phase-Locked Loops (PLLs). Each PLL has a specific function. The System PLL (SPLL) drives the CLKF output and provides fixed output frequencies on the configurable outputs. The SPLL offers the most output frequency divider options. The CPU PLL (CPLL) is controlled by the select inputs (S0–S2) to provide eight user-selectable frequencies with smooth slewing between frequencies. The Utility PLL (UPLL) provides the most accurate clock. It is often used for miscellaneous frequencies not provided by the other frequency sources.

All configurations are EPROM programmable, providing short sample and production lead times. Please refer to the application note “Understanding the CY2291, CY2292, and CY2295” for information on configuring the part.

Power Saving Features

The SHUTDOWN/OE input three-states the outputs when pulled LOW (the 32-kHz clock output is not affected). If system shutdown is enabled, a LOW on this pin also shuts off the PLLs, counters, the reference oscillator, and all other active compo- nents. The resulting current on the VDD pins are less than 50 μA (for Commercial Temp. or 100 μA for Industrial Temp.) plus 15 μA max. for the 32-kHz subsystem and is typically 10 μA. After leaving shutdown mode, the PLLs have to re-lock. All outputs except 32K have a weak pull down so that the outputs do not float when three-stated.[4]

The S2/SUSPEND input can be configured to shut down a customizable set of outputs and/or PLLs, when LOW. All PLLs and any of the outputs except 32K can be shut off in nearly any

combination. The only limitation is that if a PLL is shut off, all outputs derived from it must also be shut off. Suspending a PLL shuts off all associated logic, while suspending an output simply forces a three-state condition.[3]

The CPUCLK can slew (transition) smoothly between 8 MHz and the maximum output frequency (100 MHz at 5V/80 MHz at 3.3V for Commercial Temp. parts or 90 MHz at 5V/66.6 MHz at 3.3V for Industrial Temp. and for field-programmed parts). This feature is extremely useful in “Green” PC and laptop applications, where reducing the frequency of operation can result in considerable power savings. This feature meets all 486 and Pentium® processor slewing requirements.

CyClocks Software

CyClocksis an easy-to-use application that allows you to configure any one of the EPROM programmable clocks offered by Cypress. You may specify the input frequency, PLL and output frequencies, and different functional options. Please note the output frequency ranges in this data sheet when specifying them in CyClocks to ensure that you stay within the limits. CyClocks also has a power calculation feature that allows you to see the power consumption of your specific configuration. CyClocks is a sub-application within the CyberClocks™ software. You can download a copy of CyberClocks for free on Cypress’s web site at www.cypress.com.

Cypress FTG Programmer

The Cypress Frequency Timing Generator (FTG) Programmers is a portable programmer designed to custom program our family of EPROM Field Programmable Clock Devices. The FTG programmers connect to a PC serial port and allow users of CyClocks software to quickly and easily program any of the CY2291F, CY2292F, CY2071AF, and CY2907F devices. The ordering code for the Cypress FTG Programmer is CY3670.

Custom Configuration Request Procedure

The CY229x are EPROM-programmable devices that may be configured in the factory or in the field by a Cypress Field Appli- cation Engineer (FAE). The output frequencies requested are matched as closely as the internal PLL divider and multiplier options allow. All custom requests must be submitted to your local Cypress FAE or sales representative. The method to use to request custom configurations is:

Use CyClocks™ software. This software automatically calcu- lates the output frequencies that can be generated by the CY229x devices and provides a print-out of final pinout which can be submitted (in electronic or print format) to your local FAE or sales representative. The CyClocks software is available free of charge from the Cypress web site (http://www.cypress.com) or from your local sales representative.

Once the custom request has been processed you receive a part number with a 3-digit extension (for example, CY2292SC-128) specific to the frequencies and pinout of your device. This is the part number used for samples requests and production orders.

Document #: 38-07189 Rev. *C

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram BenefitsPin Definitions Name Pin Number Description PinoutsOperation Output ConfigurationPower Saving Features Custom Configuration Request ProcedureParameter Description Part Numbers Min Max Unit Electrical Characteristics, CommercialMaximum Ratings Operating Conditions5Electrical Characteristics, Industrial Switching Characteristics, Commercial Parameter Name Description Min Typ Max UnitCpll 50% CY2291F MHzOperation 80 MHz 76.923 kHz CY2291F 66.6 MHz 76.923 kHz Output Duty80 MHz 76.923 kHz Output Duty Switching Characteristics, IndustrialOutput Period Clock output range CY2291I 5V operation 90 MHz 76.923 kHz CY2291FIClock Jitter14 Peak-to-peak period jitter fOUT 50 MHz Switching WaveformsMHz/ms Clock Jitter14 Peak-to-peak period jitterPackage Characteristics Test CircuitOrdering Information Pin 300 MIL Soic Package Outline Package DiagramSales, Solutions, and Legal Information Document HistoryOrig. Submission Description of Change Date