Cypress CY7C1024DV33 Document History Page, Sales, Solutions, and Legal Information, ECN No, Date

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Document History Page

CY7C1024DV33

Document History Page

Document Title: CY7C1024DV33, 3-Mbit (128K X 24) Static RAM

Document Number: 001-08353

Rev.

ECN No.

Orig. of

Submission

Description of Change

Change

Date

 

 

 

 

 

 

 

 

**

469517

NXR

See ECN

New data sheet

 

 

 

 

 

*A

499604

NXR

See ECN

Added note 1 for NC pins

 

 

 

 

Changed ICC specification from 150 mA to 185 mA

 

 

 

 

Updated Test Condition for ICC in DC Electrical Characteristics table

 

 

 

 

Added note for tACE, tLZCE, tHZCE, tPU, tPD, tSCE in AC Switching Characteristics Table

 

 

 

 

on page 4

*B

1462586

VKN/SFV

See ECN

Converted from preliminary to final

 

 

 

 

Updated block diagram

 

 

 

 

Changed ICC specification from 185 mA to 225 mA

 

 

 

 

Updated thermal specs

*C

2604677

VKN/PYRS

11/12/08

Removed Commercial operating range, Added Industrial operating range

 

 

 

 

Removed 8 ns speed bin, Added 10 ns speed bin

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© Cypress Semiconductor Corporation, 2006-2008. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document Number: 001-08353 Rev. *C

Revised November 6, 2008

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All product and company names mentioned in this document are the trademarks of their respective holders.

 

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Contents Logic Block Diagram FeaturesCY7C1024DV33 Functional DescriptionSelection Guide Pin ConfigurationDescription UnitMaximum Ratings DC Electrical CharacteristicsOperating Range CapacitanceAC Switching Characteristics Figure 2. AC Test Loads and Waveform4Parameter Read Cycle Data Retention Characteristics AC Switching Characteristics continuedData Retention Waveform ConditionsFigure 3. Read Cycle No. 1 Address Transition Controlled 13 Switching WaveformsFigure 4. Read Cycle No. 2 OE Controlled 3, 14 Figure 5. Write Cycle No. 1 CE Controlled 3, 16Power Switching Waveforms continuedTruth Table Figure 6. Write Cycle No. 2 WE Controlled, OE HIGH During Write 3, 16Ordering Information Package DiagramSpeed Ordering CodeDocument History Page Sales, Solutions, and Legal InformationDocument Title CY7C1024DV33, 3-Mbit 128K X 24 Static RAM Document Number