Cypress CY7C1018DV33 manual Document History, Issue Date Orig. Description of Change

Page 9

CY7C1018DV33

Document History Page

Document Title: CY7C1018DV33, 1-Mbit (128K x 8) Static RAM

Document Number: 38-05465

REV.

ECN NO.

Issue Date

Orig. of

Description of Change

Change

 

 

 

 

 

 

 

 

 

**

201560

See ECN

SWI

Advance Information data sheet for C9 IPP

 

 

 

 

 

*A

238471

See ECN

RKF

DC parameters modified as per EROS (Spec # 01-02165)

 

 

 

 

Pb-free Offering in the Ordering Information

*B

262950

See ECN

RKF

Added Data Retention Characteristics table

 

 

 

 

Added Tpower Spec in Switching Characteristics table

 

 

 

 

Shaded Ordering Information

*C

307598

See ECN

RKF

Reduced Speed bins to -8 and -10 ns

 

 

 

 

 

*D

520647

See ECN

VKN

Converted from Preliminary to Final

 

 

 

 

Removed Commercial Operating range

 

 

 

 

Removed 8 ns speed bin

 

 

 

 

Added ICC values for the frequencies 83MHz, 66MHz and 40MHz

 

 

 

 

Updated Thermal Resistance table

 

 

 

 

Updated Ordering Information Table

 

 

 

 

Changed Overshoot spec from VCC+2V to VCC+1V in footnote #2

Document #: 38-05465 Rev. *D

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Contents Logic Block Diagram FeaturesFunctional Description1 Cypress Semiconductor CorporationSelection Guide Maximum RatingsOperating Range Capacitance3 Thermal Resistance3AC Test Loads and Waveforms4 AC Switching Characteristics Over the Operating Range Parameter Description Industrial Unit Min Max Read CycleWrite Cycle 10 Data Retention Characteristics Over the Operating Range Switching WaveformsData Retention Waveform Write Cycle No WE Controlled, OE High During Write16 Write Cycle No CE Controlled16Data I/O Data Valid Data I/O Data in ValidTruth Table 0-I/O Mode PowerOrdering Information Write Cycle No WE Controlled, OE LOW11Pin 300-Mil Molded SOJ Package DiagramDocument History Issue Date Orig. Description of Change