Cypress CY8C21634 manual Designing with PSoC Designer, Select Components, Configure Components

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CY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234

Designing with PSoC Designer

The development process for the PSoC device differs from that of a traditional fixed function microprocessor. The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs. These configurable resources, called PSoC Blocks, have the ability to implement a wide variety of user-selectable functions.

The PSoC development process can be summarized in the following four steps:

1.Select components

2.Configure components

3.Organize and Connect

4.Generate, Verify, and Debug

Select Components

Both the system-level and chip-level views provide a library of prebuilt, pretested hardware peripheral components. In the system-level view, these components are called “drivers” and correspond to inputs (a thermistor, for example), outputs (a brushless DC fan, for example), communication interfaces (I2C-bus, for example), and the logic to control how they interact with one another (called valuators).

In the chip-level view, the components are called “user modules”. User modules make selecting and implementing peripheral devices simple, and come in analog, digital, and mixed signal varieties.

Configure Components

Each of the components you select establishes the basic register settings that implement the selected function. They also provide parameters and properties that allow you to tailor their precise configuration to your particular application. For example, a Pulse Width Modulator (PWM) User Module configures one or more digital PSoC blocks, one for each 8 bits of resolution. The user module parameters permit you to establish the pulse width and duty cycle. Configure the parameters and properties to correspond to your chosen application. Enter values directly or by selecting values from drop-down menus.

Both the system-level drivers and chip-level user modules are documented in data sheets that are viewed directly in the PSoC Designer. These data sheets explain the internal operation of the component and provide performance specifications. Each data sheet describes the use of each user module parameter or driver

property, and other information you may need to successfully implement your design.

Organize and Connect

You can build signal chains at the chip level by interconnecting user modules to each other and the IO pins, or connect system level inputs, outputs, and communication interfaces to each other with valuator functions.

In the system-level view, selecting a potentiometer driver to control a variable speed fan driver and setting up the valuators to control the fan speed based on input from the pot selects, places, routes, and configures a programmable gain amplifier (PGA) to buffer the input from the potentiometer, an analog to digital converter (ADC) to convert the potentiometer’s output to a digital signal, and a PWM to control the fan.

In the chip-level view, perform the selection, configuration, and routing so that you have complete control over the use of all on-chip resources.

Generate, Verify, and Debug

When you are ready to test the hardware configuration or move on to developing code for the project, perform the “Generate Application” step. This causes PSoC Designer to generate source code that automatically configures the device to your specification and provides the software for the system.

Both system-level and chip-level designs generate software based on your design. The chip-level design provides application programming interfaces (APIs) with high level functions to control and respond to hardware events at run-time and interrupt service routines that you can adapt as needed. The system-level design also generates a C main() program that completely controls the chosen application and contains placeholders for custom code at strategic positions allowing you to further refine the software without disrupting the generated code.

A complete code development environment allows you to develop and customize your applications in C, assembly language, or both.

The last step in the development process takes place inside the PSoC Designer’s Debugger subsystem. The Debugger downloads the HEX image to the ICE where it runs at full speed. Debugger capabilities rival those of systems costing many times more. In addition to traditional single-step, run-to-breakpoint and watch-variable features, the Debugger provides a large trace buffer and allows you define complex breakpoint events that include monitoring address and data bus values, memory locations and external signals.

Document Number: 38-12025 Rev. *O

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram San Jose, CA Document Number 38-12025 Rev. *OPSoC Functional Overview PSoC CoreDigital System Array Analog SystemAdditional System Resources Analog Multiplexer SystemGetting Started PSoC Device CharacteristicsPSoC Device Characteristics PSoC Part NumberDevelopment Tools PSoC Designer Software SubsystemsIn-Circuit Emulator Select Components Configure ComponentsDesigning with PSoC Designer Organize and ConnectUnits of Measure Document ConventionsAcronyms Used Numeric NamingPin Information Pin Part PinoutActive high external reset with internal pull down XresCY8C21534 28-Pin PSoC Device QFN CY8C21634 part OCD Ocdo OCD OcdeOCD even data IO OCD odd data outputOCD Hclk Pin Definitions CY8C21001 56-Pin SsopPin No Type Pin Name Description Digital Analog OCD CclkRegister Mapping Tables Register ReferenceRegister Conventions Register Conventions DescriptionRegister Map 1 Table Configuration Space Name Addr 1,Hex AccessCY8C21634, CY8C21534 CY8C21434, CY8C21334, CY8C21234 Electrical Specifications Units of Measure Symbol Unit of MeasureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating TemperatureDC Electrical Characteristics Symbol Description Min Typ Max UnitsDC Chip-Level Specifications Symbol Description Min Typ DC General Purpose IO SpecificationsAgnd DC Operational Amplifier Specifications DC Low Power Comparator Specifications DC Switch Mode Pump SpecificationsPSoC DC Analog Mux Bus Specifications DC POR and LVD SpecificationsDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsDC24M Internal Main Oscillator Frequency for 12 MHz CPU Frequency 2.7V NominalDigital PSoC Block Frequency 2.7V Nominal AC General Purpose IO Specifications AC Operational Amplifier SpecificationsAC Low Power Comparator Specifications AC Analog Mux Bus Specifications Switch Rate MHzAC Digital Block Specifications AC External Clock Specifications AC Programming Specifications AC I2C Specifications Set up Time for a Repeated Start Condition Set up Time for Stop ConditionPackaging Dimensions Packaging InformationPin 5x5 mm 0.93 MAX QFN Pin 5x5 mm 0.60 MAX QFN Pin Sawn QFN Package Soic Thermal ImpedancesThermal Impedances per Package Typical θ JA Typical θ JC SsopSolder Reflow Peak Temperature 32 QFNDevelopment Tool Selection SoftwareEvaluation Tools Accessories Emulation and Programming Device ProgrammersThird-Party Tools Build a PSoC Emulator into Your Board Ordering Information PackageCY 8 C 21 Ordering Code DefinitionsDocument History Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB

CY8C21634, CY8C21534, CY8C21434, CY8C21334, CY8C21234 specifications

The Cypress CY8C21234, CY8C21334, CY8C21434, CY8C21534, and CY8C21634 are members of the PSoC® 1 family of microcontrollers, designed for embedded applications that demand flexibility, integration, and efficiency. These microcontrollers are well-suited for a variety of projects due to their unique characteristics and advanced technologies.

One of the primary features of the PSoC 1 series is the integration of analog and digital components on a single chip. This combination allows for the implementation of complex control algorithms without the need for multiple external components. Each device in this family is equipped with programmable analog blocks capable of interfacing with sensors, as well as digital blocks that facilitate communication with various peripherals.

The CY8C21234 series provides a 16-bit architecture, which enhances performance for processing and control tasks. The microcontrollers boast an operational range of up to 24 MHz, making them suitable for high-speed applications. With up to 16 KB of flash memory, these devices have ample memory for storing program code and user data.

Another key characteristic of the CY8C21234, CY8C21334, CY8C21434, CY8C21534, and CY8C21634 devices is their ease of use. They come with a comprehensive development environment known as PSoC Designer. This software provides a user-friendly interface to configure the device’s hardware resources graphically and allows for seamless integration of custom firmware.

In terms of communication capabilities, these microcontrollers support multiple protocols, including I²C, SPI, and UART, providing versatile interfacing options with other devices. This makes them ideal for applications such as sensor processing, motor control, and portable devices.

Power management is another significant highlight of the PSoC 1 family. The microcontrollers are designed with low-power operation in mind, featuring multiple sleep modes that contribute to extended battery life in portable applications.

Overall, the Cypress CY8C21234, CY8C21334, CY8C21434, CY8C21534, and CY8C21634 microcontrollers are a versatile solution for a wide range of embedded applications, combining programmable analog and digital components, ease of development, and efficient power management in a compact form factor. Their performance and flexibility make them a popular choice among engineers and developers exploring innovative designs.
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