Cypress CY62146DV30 manual Write Cycle No WE Controlled15, 19, Write Cycle No CE Controlled15, 19

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CY62146DV30

Write Cycle No. 1 (WE Controlled)[15, 19, 20]

DATAIN

NOTE 21

tHZOE

Notes:

19.Data I/O is high impedance if OE = VIH.

20.If CE goes HIGH simultaneously with WE = VIH, the output remains in a high-impedance state.

21.During this period, the I/Os are in output state and input signals should not be applied.

Document #: 38-05339 Rev. *A

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1Typ Max Product PortfolioTsop II Top View Vfbga Top ViewMaximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Data Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance9 AC Test Loads and Waveforms10Switching Characteristics Over the Operating Range Data OUT Previous Data Valid Switching WaveformsRead Cycle 1 Address Transition Controlled16 AddressWrite Cycle No CE Controlled15, 19 Write Cycle No WE Controlled15, 19Data I/O Write Cycle No BHE/BLE Controlled, OE LOW20 Write Cycle No WE Controlled, OE LOW20DATAI/O Data BV48A Inputs/Outputs Mode PowerOrdering Information BHE BLELead Vfbga 6 x 8 x 1 mm BV48A Package DiagramPin Tsop II ZS44 AJU Issue Date Orig. Description of ChangeDocument History REV ECN no