B&B Electronics 232PCC2 manual Common Problems, Memory Range Exclusion

Example 4

DSP100EN.EXE (s0,b300,i3,wd8)

In example 4, the Enabler will configure the 232PCC2 in socket 0 with a base address of 300H and IRQ 3 using a configuration memory window at segment D800. The 232PCC2's interrupt status register will be enabled and the BIOS equipment list will not be updated.

Example 5

DSP100EN.EXE (s0,b300,i5,r)

In example 5, the Enabler will release the configuration used by the 232PCC2 in socket 0 using a configuration memory window at segment D000. The base address and IRQ parameters are ignored and may be omitted.

Example 6

DSP100EN.EXE (s1,r,wcc)

In example 5, the Enabler will release the configuration used by the 232PCC2 in socket 1 using a configuration memory window at segment CC00.

Common Problems

Identifying the 232PCC2

The 232PCC2 is identified as a DSP-100 when installed.

Memory Range Exclusion

The Enabler requires a region of high DOS memory when configuring a 232PCC2. This region is 1000H bytes (4KB) long and by default begins at address D0000H (the default address may be changed using the "W" option). If a memory manager such as EMM386, QEMM, or 386Max is installed on the system, this region of DOS memory must be excluded from the memory manager's control. Consult the documentation provided with the memory manager software for instructions on how to exclude this memory region.

Documentation Number 232PCC23799 Manual 13

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