Dell™ PowerEdge™ T610 Technical Guidebook
T610 Volatility Chart Continued.
How is data input to this memory?
Planar, Poweredge T610
| Loading flash memory requires a |
| up the system from a floppy or |
System BIOS SPI Flash | loaded with arbitrary data in firmware memory would not operate. Future firmware releases may add support |
| for recovery of a bad/corrupted BIOS ROM image via the iDRAC (administrator privilege plus specific firmware, |
| binary, and commands) |
| Loading flash memory requires a |
LOM Configuration Data | up the system from a floppy or |
| with arbitrary data in firmware memory would not operate. |
iDRAC6 Controller ROM | N/A |
How is this memory write protected?
How is the memory cleared?
Planar, Poweredge T610
System BIOS SPI Flash | Software write protected | Not possible with any utilities or applications and | |
system is not functional if corrupted/removed. | |||
|
| ||
| Not explicitly protected but special applications |
| |
LOM Configuration Data | are needed to communicate through the LOMs to | Not user clearable | |
| reprogram this ROM. |
| |
iDRAC6 Controller ROM | Protected permanently by hardware | Not clearable | |
iDRAC6 Controller RAM | n/a | iDRAC reset | |
System CPLD | Requires special | Not possible with any utilities or applications and | |
system is not functional if corrupted/removed. | |||
|
| ||
System CPLD | It's not accessible | Not clearable | |
iDRAC6 Express Internal | Writes are proxied through a temporary iDRAC |
| |
scratchpad RAM and not directly made from an OS or | Not user clearable | ||
Flash | |||
OS application. |
| ||
|
| ||
System RAM | OS control | Reboot or power down system | |
TPM ID EEPROM | HW read only | Not - read only | |
(Plug in module only) | |||
|
| ||
TPM Binding EEPROM | Locked by BIOS from physical access by anyone after | N/A - BIOS control only | |
(on China planar only) | boot | ||
| |||
iDRAC6 SDRAM | n/a | AC cycle for BMC OS and reset / power off server for | |
VGA frame buffer | |||
|
| ||
iDRAC6 FRU | Writes controlled by iDRAC embedded OS | EPPID is not clearable | |
|
| Not possible with any utilities or applications and | |
iDRAC6 Boot Block | iDRAC embedded OS control of the write protection. | iDRAC does not function as expected if corrupted/ | |
Flash | removed. Lifecycle log is clearable only in a factory | ||
| |||
|
| environment. SEL is user clearable. | |
Trusted Platform Module | SW write protected | F2 setup option |
chipset
CMOS
N/A - BIOS only control
Planar NVRAM_CLR jumper or remove AC cord, remove cover, remove coin cell battery. Wait for 30 seconds, replace battery, cover, and then AC cord.
F2 system setup option to restore defaults
2.5" backplane or 3.5" Backplane
Storage Controller Processor
Embedded firmware only writeable through controlled iDRAC methods
Not possible with any utilities or applications and backplane does not function as expected if corrupted/ removed.
control panel
Internal USB | OS control | OS control format |
Internal SD Module | Only by SD card | OS control format |
Power Supply |
|
|
PSU Microcontroller
Protected by the embedded microcontroller. Special keys are used by special
N/A - not
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