Lynx EPM-4 manual Default Enabled, Default IRQ7, Default SPP, Default 133 MHz, Default Write-Back

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CMOS Setup / Advanced Configuration

PS/2 MOUSE (IRQ12)

Default: Enabled

When disabled, IRQ12 is freed for other devices.

LPT1 (0378H)

Default: IRQ7

Allows you to disable or specify the IRQ used by LPT1 on the SMSC FDC37B727 Super I/O. When disabled, the IRQ and I/O space are freed.

PARALLEL PORT MODE

Default: SPP

This option allows the user to change the communication mode of the parallel port. The options are: SPP, SPP/EPP1.9, ECP, ECP/EPP1.9, Printer, SPP/EPP1.7, ECP/EPP1.7, and FDD. The FDD option must be set if a floppy drive is used.

CPU SPEED

Default: 133 MHz

The maximum clock rate for the ÉlanSC520 Microcontroller is 133 MHz. It can optionally be set to 100 MHz for a slight power savings. If an extended temperature board version is detected, the default will change to 100 MHz.

CACHE MODE

Default: Write-Back

The 16 kb L1 cache can be configured for either write-through or write-back mode. This option controls the CACHE_WR_MODE in the CPUCTL register (MMCR offset 02h).

WRITE BUFFER

Default: Enabled

When the write buffer is enabled, it buffers all write activity from the CPU, PCI bus, or GP bus. This option controls the WB_ENB bit in the DBCTL register (MMCR offset 40h).

GP BUS TIMINGS

Default: Normal

The GP (ISA) bus timings may need to be slowed to accommodate ISA Plug-n-Play cards. This option modifies registers in the GP Bus Controller, MMCR offsets C08h through C10h.

EPM-4 Reference Manual

Configuration / Operation 13

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Contents Reference Manual EPM-4 Support Product Release NotesReference Manual Model EPM-4Page Table of Contents Appendix a CBL/CBR-5009 Appendix B References Description IntroductionCompatibility Technical SpecificationsEPM-4 Block Diagram RoHS-Compliant Version EPM-4 Support Website Technical SupportPage Overview Configuration / OperationInitial Configuration and Setup Basic Cmos Configuration Cmos Setup / Boot Procedure Console Redirection Boot Order Cmos Setup / IDE ConfigurationIDE Drive Geometry Drive Assignment OrderBios Ext Cmos Setup / Advanced ConfigurationDefault 0E0h Default DisabledDefault IRQ7 Default EnabledDefault SPP Default 133 MHzDefault IRQ4 Default IRQ3Default IRQ11 Save Cmos as custom defaults Using Custom Cmos DefaultsPage Reference Physical DimensionsReference EPM-4 Reference Manual Hardware Assembly B10 External ConnectorsMating Transition Cable ‡Pin 1 Location Connector Function Connector Functions and Interface CablesJumper Block Locations Jumper Block LocationsJumper Summary System Bios SelectorPower Supply Main Power Connector Pinout Signal Name DescriptionCBL/CBR-1008 Reorder Part No EPM-4 Revision Battery TypeReal Time Clock System RAMSerial Ports Battery Backed Static RAMIDE Hard Drive Connector Pinout Signal Pin Name Signal Name FunctionIDE Hard Drive / CompactFlash / CD-ROM Interface Utility Connector J7 Utility Connector Pinout CBR-5009 SignalCBR-5009 Pin Connector Signal KEYBOARD/MOUSE Interface Parallel / Floppy Port Centronics Floppy Signal Pin DirectionEthernet Interface RJ45 Ethernet ConnectorGreen LED Link / Activity Yellow LED SpeedWatchdog Timer PC/104-PlusModules Expansion BusPC/104 Modules Memory and I/O Map Memory MapStart End Address Comment On-Board I/O Devices MAPComponents Group Interrupt ConfigurationSCR READ/WRITE 00E0h Special Control RegisterRevision Indicator Register Revind Read only 00E1hBit Mnemonic Description Mpcr READ/WRITE 00E3H Map and Paging Control RegisterPage Appendix a CBL/CBR-5009 a CBL/CBR-5009 ConnectorsCBL/CBR-5009 Schematic CBL/CBR-5009 Dimensions and MountingAppendix B References