Silicon Image SSD-D32G(I)-4300 manual Time from Strobe edge to ns

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ELECTRICAL SPECIFICATION

 

 

 

SSD-DXXX(I)-4300 DATA SHEET

 

 

Table 13: UDMA Data Burst Timing Requirements (Continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Mode 0

 

Mode 1

Mode 2

Mode 3

Mode 4

Comment (see Notes 1 and

Units

 

 

 

 

 

 

 

 

Min. Max.

Min. Max.

Min. Max.

Min. Max.

Min. Max.

2)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSS

 

50 -

 

50 -

50 -

50 -

50 -

Time from STROBE edge to ns

 

 

 

 

 

 

 

 

 

negation of DMARQ or

 

 

 

 

 

 

 

 

 

 

assertion of STOP (when the

 

 

 

 

 

 

 

 

 

 

sender terminates a burst).

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

 

 

 

 

 

 

 

 

 

1.Timing parameters are measured at the connector of the sender or receiver to which the parameter applies. Both STROBE and DMARDY- timing measurements are taken at the sender’s connector.

Example: For example, the sender stops generating STROBE edges tRFS after the negation of DMARDY-.

2.All timing measurement switching points (low-to-high and high-to-low) are taken at 1.5V.

3.The symbols tUI, tMLI, and tLI indicate sender-to-recipient or recipient-to-sender interlocks (i.e., either the sender or recipient is waiting for the other to respond with a signal before proceeding). The symbol tUI is an unlimited interlock that has no maximum time value, tMLI is a limited time-out that has a defined minimum, and tLI is a limited time-out that has a defined maximum.

4.The test load for tDVS and tDVH are a lumped capacitor load with no cable or receivers. Timing for tDVS and tDVH are met for all capacitive loads from 15pF to 40pF where all signals have the same capacitive load value.

5.The symbol tZIORDY may be greater than tENV since the device has a pull-up on IORDY- giving it a known state when released.

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4300D-00DSR

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FEBRUARY 27, 2009

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Contents Sisecure FeaturesOverview 4300D-00DSR February 27 Initial release Revision HistoryDocument No Release Date Changes Table of Contents Task File Register Specification Related Documentation Sales and Support Part NumberingList of Figures List of Tables Idle Immediate 95h, E1h Part Numbering Nomenclature Physical Dimensions Physical SpecificationsPin Locations System Performance Product SpecificationsSystem Power Requirements Years 402.9GB SSD-D004G-4300 SiliconDrive Part# Capacity Service Life GB Written per DayReliability Operational Life SpanProduct Capacity Number Bytes Sectors Cylinders Heads Track Product Capacity SpecificationsEnvironmental Specifications Ultra DMA Electrical SpecificationPin Assignments PinDisk Active/Slave Present. This open Signal DescriptionsSignal Name Pins Type Description Data Inputs/Outputs. This is the 8-bit orTransfers between the host and device DMA Request. This signal is used for DMAFor DMA data transfers between the host This signal is a DMA request that is usedGround. The device ground signal Interrupt Request. This signal is an activeDevice I/O Read. This is the read strobe Channel Ready. The signal is negatedWhen Udma mode DMA write is active When Udma mode DMA read is activeAbsolute Maximum Ratings Device Power Supply. The device powerSymbol Parameter Minimum Maximum Units Symbol Parameter 5V ± 10% Units Minimum Maximum DC CharacteristicsTrue IDE PIO Mode Read/Write Access Timing Diagram True IDE PIO Mode Read/Write Access TimingTrue IDE PIO Mode Read/Write Access Timing True IDE PIO Multiword DMA Read/Write Access Timing Symbol Mode 0 Mode Mode 3 Mode 4 Note Units True IDE PIO Multiword DMA Read/Write Access TimingInitiating a Udma Data-In Burst Ultra DMA Data Burst Timing RequirementsSustained Udma Data-In Burst Device Terminating a Udma Data-In Burst Host Terminating a Udma Data-In Burst Initiating a Udma Data-Out Burst Device Pausing a Udma Data-Out Burst Host Terminating a Udma Data-Out Burst Udma Data Burst Timing Requirements Device Terminating a Udma Data-Out BurstMin Max Min. Max Time from Strobe edge to ns CS0# CS1# DA02 DA01 DA00 Task File Register SpecificationATA and True IDE Register Decoding ATA Registers Error RegisterByte Feature RegisterOperation Read/WriteSector Count Register Read/Write Sector Count Default ValueLogical Block Number bits A07-A00 LBA Addressing Sector Number RegisterRead/Write Logical Block Number bits A15-A08 LBA Addressing Cylinder Low RegisterLow Logical Block Number bits A23-A16 LBA Addressing Cylinder High RegisterLBA27 LBA26 LBA25 LBA24 Drive/Head RegisterCorrected Data CORR. Always set to Drive Write Fault DWF. Always set toStatus Register Operation Read/Write ATA Command Code Command RegisterAlternate Status Register NIEN Device Control RegisterWrite Device Address Register Read/Write NWTG NHS3 NHS2 NHS1 NHS0 NDS1 NDS0 Default ValueClass Command Name Registers Used Code ATA Command Block and SET DescriptionATA Command Block and Set Description ATA Command SetATA Command Set Register Check Power Mode 98h, E5hCheck Power Mode 98h, E5h Executive Drive Diagnostic 90h Executive Drive Diagnostic 90hFormat Track 50h Drive Head Number LBA27-24 Command 50hFormat Track 50h Identify Drive ECh Identify Drive EChIdentify Drive Drive Attribute Data Word Data Default Bytes Data Description AddressIdentify Drive Drive Attribute Data Identify Drive Drive Attribute Data Idle 97h, E3h Idle 97h, E3hIdle Immediate 95h, E1h Idle Immediate 95h, E1hInitialize Drive Parameters 91h Initialize Drive Parameters 91hRecalibrate 1Xh Drive Command 1XhRecalibrate 1Xh Read Buffer E4h Read Buffer E4hRead DMA C8h Drive Head Number LBA27-24 Command C8hRead DMA C8h Read Multiple C4h Drive Head Number LBA27-24 Command C4hRead Multiple C4h Read Sector 20h, 21h Drive Head Number LBA27-24 Command 20h or 21hRead Sector 20h, 21h Read Long Sectors 22h, 23h Drive Head Number LBA27-24 Command 22h or 23hRead Long Sectors 22h, 23h Read Verify Sectors 40h, 41h Drive Head Number LBA27-24 Command 40h or 41hRead Verify Sectors 40h, 41h Seek 7Xh Drive Head Number LBA27-24 Command 7XhSeek 7Xh Feature Operation Set Features EFhSet Features EFh Set Features’ AttributesSet Multiple Mode C6h Set Multiple Mode C6hSet Sleep Mode 99h, E6h Set Sleep Mode 99h, E6hStandby 96h, E2h Standby 96h, E2hStandby Immediate 94h, E0h Standby Immediate 94h, E0hWrite Buffer E8h Write Buffer E8hWrite DMA CAh Drive Head NumberLBA27-24 Command CAhWrite DMA CAh Write Multiple C5h Drive Head NumberLBA27-24 Command C5hWrite Multiple C5h Write Sectors 30h, 31h Drive Head Number LBA27-24 Command 30h or 31hWrite Sectors 30h, 31h Write Long Sectors 32h, 33h Drive Head Number LBA27-24 Command 32h or 33hWrite Long Sectors 32h, 33h Erase Sectors C0h Drive Head Number LBA27-24 Command C0hErase Sectors C0h Request Sense 03h Extended Error CodesExtended Error Codes Description Request Sense 03hTranslate Sector 87h Drive Head Number LBA27-24 Command 87hTranslate Sector 87h Wear-Level F5h Wear-Level F5hWrite Multiple w/o Erase CDh Drive Head Number LBA27-24 Command CDhWrite Multiple w/o Erase CDh Write Sectors w/o Erase 38h Drive Head Number LBA27-24 Command 38hWrite Sectors w/o Erase 38h Write Verify 3Ch Drive Head Number LBA27-24 Command 3ChWrite Verify 3Ch Part Numbers Sales and SupportPart Numbering Part Numbering NomenclatureFront Label Lot Code Information Standard Back Label withRelated Documentation Related Documentation

SSD-D32G(I)-4300 specifications

The Silicon Image SSD-D32G(I)-4300 is a high-performance solid-state drive designed to meet the needs of both consumer and enterprise users. With a capacity of 32GB, this SSD offers an ideal balance of performance, reliability, and affordability. One of the main features of the SSD-D32G(I)-4300 is its use of advanced NAND flash memory technology, which provides faster data access and improved durability compared to traditional hard disk drives.

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