Chapter 3 | Hardware |
•Supports Spread Spectrum Clocking; center and down spread support utilizing an external SSC clock
•Supports panel
LVDS Interface
Table
Pin # | Signal | Description | Line | Channel |
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1 | +12V | JP5 = +5 or +12V |
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| NOTE | Pins |
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| source |
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| constitute 1st | |
2 | VCC_LCD | JP4 = +3.3 or +5V |
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| channel |
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| source |
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| interface of |
3 | GND | Ground | Gnd |
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| two channels, |
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| or a single | ||||
4 | GND | Ground |
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| channel | |||
5 | LVDSB_Clk+ | Clock Positive Output | Clk |
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| interface. Pins |
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6 | LVDSB_Clk- | Clock Negative |
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| constitute 2nd | |||
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| Output |
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| channel |
7 | NC | Not Connected | 3 |
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| interface of | ||||
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8 | NC | Not Connected |
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| two channels. |
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9 | LVDSB_Y2+ | Data Positive Output | 2 | Channel 1 |
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10 | LVDSB_Y2- | Data Negative Output |
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11 | LVDSB_Y1+ | Data Positive Output | 1 |
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12 | LVDSB_Y1- | Data Negative Output |
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13 | LVDSB_Y0+ | Data Positive Output | 0 |
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14 | LVDSB_Y0- | Data Negative Output |
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15 | LVD_BKLTCtl | Backlight Control |
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16 | LCD_EN | LCD Enable |
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17 | LVDSB_Clk+ | Data Positive Output | Clk |
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18 | LVDSB_Clk- | Data Negative Output |
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19 | NC | Not Connected | 3 |
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20 | NC | Not Connected |
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21 | LVDSB_Y2+ | Data Positive Output | 2 |
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22 | LVDSB_Y2- | Data Negative Output |
| Channel 2 |
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23 | LVDSB_Y1+ | Data Positive Output | 1 |
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24 | LVDSB_Y1- | Data Negative Output |
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25 | LVDSB_Y0+ | Data Positive Output | 0 |
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26 | LVDSB_Y0- | Data Negative Output |
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27 | LVDS_DDCPClk | Clock |
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28 | LVDS_DDCPData | Data |
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29 | LVD_BKLEN | Backlight Enable |
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30 | NC | Not connected |
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Note: The shaded area denotes power or ground.
MightyBoard 821 | Reference Manual | 23 |