Hyundai GMS90X52C Timer / Counter 0, Timer/Counter 0 and 1 Operating Modes Description, Tmod

HYUNDAI MicroElectronics GMS90X5XC Series

TIMER / COUNTER 0 AND 1

Timer/Counter 0 and 1 can be used in four operating modes as listed in Table 4:

Table 4. Timer/Counter 0 and 1 Operating Modes

Mode	Description			TMOD			Input Clock
		Gate	C/T		M1	M0	internal	external (Max.)
0	8-bit timer/counter with a	X	X		0	0	fOSC ÷(12×32)	fOSC ÷(24×32)
	divide-by-32 prescaler
1	16-bit timer/counter	X	X		0	1	fOSC ÷12	fOSC ÷24
2	8-bit timer/counter with	X	X		1	0	fOSC ÷12	fOSC ÷24
	8-bit auto-reload
3	Timer/counter 0 used as	X	X		1	1	fOSC ÷12	fOSC ÷24
	one 8-bit timer/counter and
	one 8-bit timer Timer 1
	stops

In the "timer" function (C/T = "0") the register is incremented every machine cycle. Therefore the count rate is fOSC/12.

In the "counter" function the register is incremented in response to a 1-to-0 transition at its corresponding exter- nal input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a falling edge the max. count rate is fOSC/24. External inputs INT0 and INT1 (P3.2, P3.3) can be programmed to function as a gate to facilitate pulse width measurements. Figure 4 illustrates the input clock logic.

fOSC ÷ 12

C/T

TMOD

0

P3.4/T0
P3.5/T1
				1
Max. fOSC/24
		TR0 / 1
		TCON
		Gate	=1
		TMOD
					≥1
P3.2 /	INT0
P3.3 / INT1

&

fOSC ÷ 12

Timer 0/1 Input Clock

Figure 4. Timer/Counter 0 and 1 Input Clock Logic

18 Jan. 2001 Ver 1.0