National ADC12V170 Evaluation Board Jumper Positions, PD Jumper Mode Setting, Output Data Format

Page 3

ADC12V170 Evaluation Board User’s Guide

1.0 Introduction

The ADC12V170 Evaluation Board is designed to support the ADC12V170 12-bit 170 Mega Sample Per Second (MSPS) Analog to Digital Converter with LVDS Outputs.

The ADC12V170 Evaluation Board comes in two versions:

1.ADC12V170HFEB (high frequency version) for input frequencies greater than 150 MHz.

2.ADC12V170LFEB (low frequency version) for input frequencies less than 150 MHz.

The digital data from the ADC12V170 evaluation board can be captured with a suitable instrument, such as a logic analyzer, or with National Semiconductor’s WaveVision signal path data acquisition hardware and software platform. The ADC12V170 evaluation board can be connected to the data acquisition hardware through the FutureBus connector (schematic reference designator FB).

The ADC12V170 is compatible with National Semiconductor’s WaveVision 5.1 and higher Signal Path Digital Interface Board and associated

WaveVision software. Please note that the ADC12V170 board is not compatible with previous versions of the WaveVision hardware (WaveVision 4.x Digital Interface Boards).

The WaveVision hardware and software package allows fast and easy data acquisition and analysis. The WaveVision hardware connects to a host PC via a USB cable and is fully configured and controlled by the latest

WaveVision software. The latest version of the WaveVision software is included in this evaluation kit on a CD-ROM. The WaveVision 5.1 Signal Path Digital Interface hardware is available through the National Semiconductor website (part number: WAVEVSN 5.1).

2.0 Board Assembly

Each evaluation board from the factory is configured for single-ended clock operation and is populated with an analog input network which has been optimized for one

The location and description of the components on the ADC12V170 evaluation board can be found in Figure 1 as well as Section 5.0 (Schematic) and Section 7.0 (Bill of Materials) of this user’s guide.

3.0 Quick Start

The ADC12V170 evaluation board enables easy set up for evaluating the performance of the ADC12V170.

If the WaveVision data acquisition and data analysis system is to be used for capturing data, please follow the Quick Start Guide in the WaveVision User’s Guide to install the required software and to connect the WaveVision Digital Interface Board to the PC and to the ADC12V170 evaluation board. Please note that the ADC12V170 evaluation board is only compatible with National Semiconductor’s WaveVision 5.1 and higher Signal Path Digital Interface boards.

3.1 Evaluation Board Jumper Positions

The ADC12V170 evaluation board jumpers should be configured as follows. Please refer to Figure 1 for the exact jumper locations.

1.J1 on the reverse of the board should be shorted.

2.The PD jumper places the ADC12V170 into either powerdown or sleep mode. Table 1 below shows how to select between the power modes.

PD Jumper

Mode

Setting

 

Open

Normal Operation

1-2

Power-down

3-4

Sleep

Table 1. CLK_SEL/DF Selection Table

3.CLK_SEL/DF pin jumpers select the output data format (2’s complement or offset binary) and clock mode (single-ended or differential). Table 2 below shows how to select between the clock modes and

output data formats. Please note that the ADC12V170 evaluation board is delivered with the ADC12V170 clock input configured for single- ended operation and Offset Binary output data format (Jumper 7-8).

of two analog input frequencies ranges:

1.ADC12V170HFEB (high frequency version) for input frequencies greater than 150 MHz.

2.ADC12V170LFEB (low frequency version) for input frequencies less than 150 MHz.

CLK_SEL/DF

Jumper

Setting

1-2

3-4

5-6

7-8*

Clock Mode

Differential

Differential

Single-Ended

Single-Ended

Output Data Format

2’s Complement Offset Binary 2’s Complement Offset Binary

Please refer to the input circuit configurations described in the Analog Input Section (4.2) of this guide.

* As assembled from factory.

Table 2. CLK_SEL/DF Selection Table

N - 3 -

www.national.com

 

Rev 0.0

Image 3
Contents Page Jumper ADC12V170 Evaluation Board User’s GuideOutput Data Format PD Jumper Mode SettingJumper Setting Clock Mode Evaluation Board Jumper PositionsConnecting Power and Signal Sources Clock InputAnalog Input Board Outputs ADC Reference and Input Common ModePower requirements Evaluation Board Schematic Schematic Evaluation Board Layout Layer 2 Ground Layer 3 Power Layer 4 Signal ADC ADC12V170HFEB For Fin 150 MHzADC12V170LFEB For Fin 150 MHz Life Support Policy