National manual ADC12V170 Evaluation Board User’s Guide, Jumper

Page 2

ADC12V170 Evaluation Board User’s Guide

Analog Input FIN > 150 MHz

Clock

Buffer

(Reverse

Side)

Analog Input

FIN < 150 MHz

Analog Input

Network

ADC

PD

Jumper

CLK_SEL/DF

Jumper

	Single-
	Ended	FutureBus
	Clock	FutureBus
	Clock	Connector
	Input	Connector
	Input

5.0V Power

Connector

Figure 1. ADC12V170 Evaluation Board Connector and Jumper Locations

N - 2 -	www.national.com
	Rev 0.0

Image 2

Contents Page ADC12V170 Evaluation Board User’s Guide JumperEvaluation Board Jumper Positions PD Jumper Mode SettingJumper Setting Clock Mode Output Data FormatAnalog Input Connecting Power and Signal SourcesClock Input ADC Reference and Input Common Mode Board OutputsPower requirements Evaluation Board Schematic Schematic Evaluation Board Layout Layer 2 Ground Layer 3 Power Layer 4 Signal ADC12V170HFEB For Fin 150 MHz ADCADC12V170LFEB For Fin 150 MHz Life Support Policy