Cypress CY24713 manual Features Benefits, Logic Block Diagram Pin Configuration

CY24713

Set-top Box Clock Generator with VCXO

Features			Benefits
■ Integrated phase-locked loop (PLL)			■ High-performance PLL tailored for Set Top Box applications
■ Low-jitter, high-accuracy outputs			■ Meets critical timing requirements in complex system designs
■ VCXO with analog adjust			■ Large ±150-ppm range, better linearity
■ 3.3V Operation			■ Meet industry standard voltage platforms
■ 8-pin SOIC			■ Industry standard packaging saves on board space
Part Number	Outputs	Input Frequency Range	Output Frequencies
CY24713	3	27-MHz pullable crystal input	4.9152 MHz, 13.5 MHz, 27 MHz
		per Cypress specification

Logic Block Diagram

Pin Configuration

Figure 1. CY24713, 8-Pin SOIC

Table 1.	Pin Definition
Name		Number	Description
XIN		1	Reference Crystal Input
VDD		2	3.3V Voltage Supply
VCXO		3	Input Analog Control for VCXO
VSS		4	Ground
CLK_B		5	13.5-MHz Clock Output
CLK_A		6	4.9152-MHz Clock Output
CLK_C		7	27-MHz Clock Output
XOUT[1]		8	Reference Crystal Output

Note

1. Float XOUT if XIN is externally driven.

Cypress Semiconductor Corporation • 198 Champion Court	•	San Jose, CA 95134-1709	•	408-943-2600
Document #: 38-07396 Rev. *A			Revised May 22, 2008

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