SERVO BOARD IC200
Pin No. | Pin Name | I/O |
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1 | FS256 | O | 11.2896MHz clock signal output (MCLK system) | Not used this set (OPEN) | ||||||
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2 |
| FOK | O | Focus OK signal output to the system controller (IC600) | “H” is output when the focus is applied | |||||
3 |
| DFCT | O | Defect ON/OFF selection signal output to CXD2536CR (IC500) | ||||||
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4 | SHCK | O | Track jump detection signal output to the system controller | Not used this set (OPEN) | ||||||
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5 | SHCKEN | I | Track jump detection enable input Not used this set (Fixed at “L”) | |||||||
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6 | WRPWR | I | Laser power selection signal input from the system controller Not used this set (Fixed at “L”) | |||||||
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7 |
| DIRC | I | Not used this set (Fixed at “H”) |
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8 | SWDT | I | Write data signal input from the system controller (IC600) |
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9 |
| SCLK | I | Serial clock signal input from the system controller (IC600) |
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10 |
| XLAT | I | Serial latch signal input from the system controller (IC600) |
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11 |
| SRDT | O | Read data signal output to the system controller (IC600) |
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12 |
| SENS | O (3) | Internal status (SENS) output to the system controller (IC600) | ||||||
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13 | ADSY | O | ADIP sync signal output | Not used this set (OPEN) |
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14 |
| SQSY | O | |||||||
| “L” every 13.3msec, Almost “H” |
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15 | DQSY | O | Digital in | |||||||
“L” every 13.3msec, Almost “H” |
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16 |
| XRST | I | Reset sigmal input from the system controller (IC600) | When reset “L” | |||||
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17 | TEST4 | I | Test input terminal (Fixed at “L”) |
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18 | CLVSCK | O | Not used this set (OPEN) |
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19 | TEST5 | I | Test input terminal (Fixed at “L”) |
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20 | DOUT | O | Output terminal of the digital audio signal (for optical out) | Not used this set (OPEN) | ||||||
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21 |
| DIN | I | Input terminal of the digital audio signal (for optical out) | Not used this set (Fixed at “L”) | |||||
22 | FMCK | O | FM modulation clock signal output of the ADIP Not used this set (OPEN) | |||||||
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23 |
| ATER | O | ADIP CRC flag output | When error “H” | Not used this set (OPEN) | ||||
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24 |
| REC | I | Record/playback selection signal input |
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| When recording :“H”, when playback :“L” | (Fixed at “L”) |
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25 |
| DVSS | – | Ground terminal (Digital system) |
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26 | DOVF | I | Validity flag input terminal for the digital audio out | Not used this set (Fixed at “L”) | ||||||
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27 | DODT | I | Input terminal of | Not used this set (Fixed at “L”) | ||||||
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28 |
| DIDT | O | Output terminal of | Not used this set (OPEN) | |||||
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29 |
| DTI | I | Record audio data signal input from CXD2536CR (IC500) |
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30 |
| DTO | O (3) | Plyback audio data signal output to CXD2536CR (IC500) |
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31 |
| C2PO | O | C2PO (indicate the error state of the data) signal output to CXD2536AR (IC500) | ||||||
| Playback : C2PO (“H”), Digital recording : D. | |||||||||
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32 |
| BCK | O | Bit clock (2.8224MHz) signal output to CXD2536CR (IC500) (MCLK system) | ||||||
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33 | LRCK | O | L/R clock (44.1kHz) signal output to CXD2536CR (IC500) (MCLK system) | |||||||
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34 | XTAO | O | System clock (512Fs=22.5792MHz) signal output | Not used this set (OPEN) | ||||||
35 |
| XTAI | I | System clock (512Fs=22.5792MHz) signal input from CXD2536CR (IC500) | ||||||
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36 | MCLK | O | MCLK clock (22.5792MHz) signal output | Not used this set (OPEN) | ||||||
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37 | XBCK | O | BCK (pin #™) inverted output Not used this set (OPEN) |
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38 | DVDDO | – | Power supply terminal (+3.3V) (Digital system) |
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39 | WDCK | O | WDCK clock (88.2kHz) signal output (MCLK system) | Not used this set (OPEN) | ||||||
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40 | RFCK | O | RFCK clock (7.35kHz) signal output (MCLK system) | Not used this set (OPEN) | ||||||
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