Motorola 6806800C47B manual Management Interface, SAF-CHK-SVC-v75 MIB

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API Description

Management Interface

 

 

2.5Management Interface

SAF-CHK-SVC-MIB is defined by SA forum’s systems management WG. This MIB provides the manageable objects to access the cluster wide created checkpoint properties, location of the checkpoint replicas, version supported etc. This MIB also defines the traps to notify the errors like no more sections, sections available now etc.

NCS Checkpoint Service implements a draft version of SAF-CKPT-SVC-MIB, which aligns with B.01.01 version of CKPT. Checkpoint Service does not support the Notifications and Traps defined in SAF-CKPT-SVC-MIB.

The following table describes the MIB objects and traps supported by NCS Checkpoint Service:

Table 2-4 SAF-CHK-SVC-v7_5 MIB

MIB table id \ trap id

Description

 

 

safSpecVersion

Supported

 

 

safAgentVendor

Supported

 

 

safAgentVendorProductRev

Supported

 

 

safServiceStartEnabled

Supported. Always set to FALSE

 

 

saCkptCheckpointTable

Supported

 

 

saCkptNodeReplicaLocTable

Supported

 

 

saCkptAlarmServiceImpaired

Not Supported

 

 

saCkptStateChgNoMoreSections

Not Supported

 

 

saCkptStateChgSectionsAvailable

Not Supported

 

 

Command Line Interface (CLI) is not supported by Checkpoint Service

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Checkpoint Service Programmer’s Reference (6806800C47B)

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Contents Checkpoint Service Trademarks Contents Contents List of Tables List of Tables Checkpoint Service -Subparts List of FiguresList of Figures About this Manual Overview of ContentsAbbreviations Notation Description ConventionsAbout this Manual Abbreviation Definition BoldAbout this Manual Summary of ChangesComments and Suggestions Part Number Publication Date DescriptionAbout this Manual Introduction OverviewCheckpoint Node Director Models and ConceptsCheckpoint Director Introduction Models and ConceptsCheckpoint Agent Compliance Table Checkpoint ServiceCompliance Report Checkpoint Agent IntroductionRelated SAF Standard Documents Introduction Related SAF Standard DocumentsNcsCkptRegisterCkptArrivalCallback Service ExtensionsAPI Description NcsCkptRegisterCkptArrivalCallback ParametersNcsCkptCkptArrivalCallback Parameters 2 *ncsCkptCkptArrivalCallbackNcsCkptRegisterCkptArrivalCallback Return Values API Description NcsCkptCkptArrivalCallbackUsage of Non-Collocated Checkpoints Implementation NotesImplementation Notes API Description Cancellation of Pending Callbacks ConfigurationTime-out Arguments for Checkpoint Service APIs Maximum Number of Replicas Per NodeShared Memory Configuration API Description Service DependenciesShared Memory Configuration Maximum Data Size Per One write or OverwriteSAF-CHK-SVC-v75 MIB Management InterfaceMIB table id \ trap id Description Run the Checkpoint Service Demo Sample ApplicationSample Application Output Sample Application Sample Application OutputTable B-1 Motorola Publications Related DocumentationMotorola Embedded Communications Computing Documents Document Title Publication NumberRelated Documentation Related Specifications Related SpecificationsTable B-2 Related Specifications Document Title Version/Source

6806800C47B specifications

The Motorola 68000 series microprocessor, which includes the 68000, 68010, 68020, and others, significantly impacted the development of computing technology. Among its variants is the Motorola 68000, often referenced for its advanced features, performance, and capacity for versatility, making it one of the most prominent processors in its time.

The Motorola 68000, with its 16-bit data bus and 32-bit internal architecture, provided a potent combination of speed and efficiency. This processor features a clock speed ranging from 5 to 25 MHz, enabling high-performance computing for a range of applications, from personal computers to embedded systems. It utilizes a sophisticated instruction set that accommodates complex operations, enabling developers to write efficient and powerful software.

One of the main characteristics of the Motorola 68000 is its ability to address 24 bits of memory space, allowing it to access up to 16 MB of RAM directly. This memory addressing capability was an impressive feature during its release, supporting more extensive and more complex applications than most contemporaries could handle at the time.

The architecture of the Motorola 68000 is notable for its orthogonal design, which provides a rich set of addressing modes, making it versatile for various programming tasks. Its instruction set includes operations for arithmetic, logic, and data manipulation, coupled with strong support for multitasking and complex data structures, essential for modern operating systems.

In terms of technology, the Motorola 68000 employed a dual-processor architecture that enabled it to work alongside other processors, such as the Motorola 68881 and 68882 floating-point coprocessors, significantly enhancing its computational capabilities especially in graphics, scientific calculations, and complex algorithms.

Furthermore, the 68000 series processors were known for their excellent interrupt handling capabilities, making them suitable for real-time applications. This feature was particularly valuable in embedded systems, telecommunications, and industrial control systems, allowing for responsiveness in processing external events.

The 68000 microprocessor also gained popularity in the world of gaming and graphics, being utilized in iconic devices like the Sega Genesis and the Atari ST series. Its performance and flexibility in diverse applications ensured that the 68000 series left an indelible mark on the evolution of computing technology, influencing generations of system design.

In conclusion, the Motorola 68000, particularly the 68000 series, is a foundation in microprocessor history, celebrated for its capabilities in memory management, software development, and multi-faceted applications that paved the way for modern computing.