4-5-3 CPU (LOGIC UNIT; IC1)
Pin | Port | Description | |
number | name | ||
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1 | PATMP | Input port for the PA’s temperature | |
while transmitting. | |||
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3 | SD | Input port for the | |
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5 | CHG | Input port for the battery voltage divide | |
signal. | |||
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6 | VIN | Input port for the power supply voltage | |
divide signal. | |||
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7 | CTCIN | Input port for the CTCSS decorded | |
signal | |||
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| Outputs the FM or WFM regulator | |
12 | WFM | control signal. | |
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| Low: FM or WFM mode is selected. | |
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| Outputs the AM mode regulator con- | |
13 | AM | trol signal. | |
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| Low: AM mode is selected. | |
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14 | CLSFT | Outputs the clock shift control signal. | |
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19 | RESET | Input port for the CPU reset signal. | |
High: The CPU is reset. | |||
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25 | POWER | Input port for the [POWER] switch. | |
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| Low: Power is ON. | |
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| Input port for the external power sup- | |
26 | CPUHV | ply connecting signal. | |
Low: While the external power sup- | |||
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| ply is connected. | |
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28 | IOSTB | Outputs the expander IC (AF unit; | |
IC51, pin 1) strobe signal. | |||
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29 | DASTB | Outputs strobe signals to the D/A IC | |
(RF unit; IC251, pin 2). | |||
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30 | CLIN | Input port for the cloning signal. | |
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31 | CLOUT | Output port for the cloning signal. | |
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| I/O port for the PLL IC (VCO unit; | |
33 | PDAUL | IC201, pin 7) data signal. | |
Low: PLL is unlocked. | |||
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| High: PLL is locked. | |
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| Outputs clock signals to the R3V | |
34 | CK | switch (AF unit; IC51, pin 3), D/A IC | |
(RF unit; IC251, pin 3) and PLL IC | |||
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| (VCO unit; IC201, pin 4). | |
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35 | PLSTB | Outputs the PLL IC strobe signal. | |
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40 | ECK | Outputs the EEPROM clock signal. | |
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42 | CHGC | Outputs the battery charger control | |
signal. | |||
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43 | PCON | Outputs the +3C regulator control sig- | |
nal. | |||
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| Outputs the R3C regulator control sig- | |
44 | R3C | nal. | |
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| Low: While receiving. | |
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| Outputs the T5V regulator control sig- | |
45 | TXC | nal. | |
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| High: While transmitting. | |
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Pin | Port | Description | |
number | name | ||
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46 | MICC | Outputs the mic amplifier regulator | |
control signal. | |||
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47 | NOISE | Input port for the SQL detection noise | |
signal. | |||
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| Outputs mute control signal. | |
48 | MUTE | High: AF muting while receiving. | |
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| MIC muting while transmitting. | |
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49 | AFON | Output AF amplifier regulator control | |
signal. | |||
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51 | BUSYL | Outputs BUSY LED control signal. | |
High: The BUSY LED is ON. | |||
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52 | GLED | Outputs key backlight control signal. | |
High: Green backlight is ON. | |||
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53 | RLED | Outputs key backlight control signal. | |
High: Red backlight is ON. | |||
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54 | LCDL | Outputs LCD backlight control signal. | |
Low: Lights ON. | |||
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| Outputs the 430 MHz VCO regulator | |
55 | V3C | control signal. | |
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| Low: 430 MHz is selected. | |
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56 | DIUD | Input port for the up/down signal from | |
57 | DICK | the main dial (AF unit; S251). | |
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Output ports for key matrix. | |||
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Output ports for Initial matrix. | |||
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Input ports for key matrix. | |||
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| Outputs the 50 MHz VCO regulator | |
70 | V1C | control signal. | |
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| Low: 50 MHz is selected. | |
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| Input port for the volume level control | |
71 | VOLDN | signal. | |
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| Low: Volume level is low. | |
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| Input port for the volume level control | |
72 | VOLUP | signal. | |
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| Low: Volume level is high. | |
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73 | SQL | Input port for the [SQL] switch. | |
Low: While [SQL] switch is pushed. | |||
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| Outputs the 430 MHz modulation cir- | |
74 | 430M | cuit control signal. | |
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| Low: While 430 MHz is transmitting. | |
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| Outputs the 144 MHz modulation cir- | |
75 | 144M | cuit control signal. | |
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| Low: While 144 MHz is transmitting. | |
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77 | PTT | Input port for the [PTT] switch. | |
High: While [PTT] switch is pushed. | |||
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| Outputs 144 MHz VCO regulator con- | |
81 | V2C | trol signal. | |
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| Low: 144 MHz is selected. | |
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82 | VSFT | Outputs the VCO select signal. | |
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